From patchwork Tue Aug 29 10:40:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Karol Kolacinski X-Patchwork-Id: 13368805 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A94791548A for ; Tue, 29 Aug 2023 10:41:07 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 302E01B3 for ; Tue, 29 Aug 2023 03:41:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1693305665; x=1724841665; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VowrIuVp1hKfrPff5NmWrNfOIdMkrXiyQkMPqwuQs1U=; b=DQ47IfsJ02lSE0FFANFqJ0IfCWA15tE3GOKnjrsqc0MyOP1zq0v9PL4a DxKj9qtQ5hUU7t8j/LL3o/bAo+fLh4JEQTBnslk7/luqgLbtGsCtGFAQT WcZrAFSNqdCiwUZTZdX4vX/65MIVK6a8z4EbyqaHUTDpwN/X83anL8h8q L0lKNojHredTczOvtk352HdX3SaN/DFjl6dnNLFxBzhuDhZ63Yic85Yh2 1Ss84EfZRnrNStEiRoegWhObqNKmT/AfnCZrxOuC/7z44wBxEwgGgvPHx hkG6rTW/KQsceqowpVh2G2Qdnn8QSWH1m3Tkrs2Se3bPvqX0gmmdm3e0m w==; X-IronPort-AV: E=McAfee;i="6600,9927,10816"; a="461696896" X-IronPort-AV: E=Sophos;i="6.02,210,1688454000"; d="scan'208";a="461696896" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2023 03:41:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10816"; a="853229796" X-IronPort-AV: E=Sophos;i="6.02,210,1688454000"; d="scan'208";a="853229796" Received: from kkolacin-desk1.igk.intel.com ([10.102.102.152]) by fmsmga002.fm.intel.com with ESMTP; 29 Aug 2023 03:41:03 -0700 From: Karol Kolacinski To: intel-wired-lan@lists.osuosl.org Cc: netdev@vger.kernel.org, anthony.l.nguyen@intel.com, jesse.brandeburg@intel.com, Jacob Keller , Karol Kolacinski Subject: [PATCH v4 iwl-next 06/11] ice: rename ice_ptp_tx_cfg_intr Date: Tue, 29 Aug 2023 12:40:36 +0200 Message-Id: <20230829104041.64131-7-karol.kolacinski@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230829104041.64131-1-karol.kolacinski@intel.com> References: <20230829104041.64131-1-karol.kolacinski@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org From: Jacob Keller The ice_ptp_tx_cfg_intr() function sends a control queue message to configure the PHY timestamp interrupt block. This is a very similar name to a function which is used to configure the MAC Other Interrupt Cause Enable register. Rename this function to ice_ptp_cfg_phy_interrupt in order to make it more obvious to the reader what action it performs, and distinguish it from other similarly named functions. Signed-off-by: Jacob Keller Signed-off-by: Karol Kolacinski --- drivers/net/ethernet/intel/ice/ice_ptp.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index 2899fc7f8deb..16491c2d036f 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -1341,14 +1341,14 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) } /** - * ice_ptp_tx_ena_intr - Enable or disable the Tx timestamp interrupt + * ice_ptp_cfg_phy_interrupt - Configure PHY interrupt settings * @pf: PF private structure * @ena: bool value to enable or disable interrupt * @threshold: Minimum number of packets at which intr is triggered * * Utility function to enable or disable Tx timestamp interrupt and threshold */ -static int ice_ptp_tx_ena_intr(struct ice_pf *pf, bool ena, u32 threshold) +static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold) { struct ice_hw *hw = &pf->hw; int err = 0; @@ -2510,8 +2510,8 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) struct ice_ptp *ptp = &pf->ptp; struct ice_hw *hw = &pf->hw; struct timespec64 ts; - int err, itr = 1; u64 time_diff; + int err; if (ptp->state != ICE_PTP_RESETTING) { if (ptp->state == ICE_PTP_READY) { @@ -2564,7 +2564,7 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) if (!ice_is_e810(hw)) { /* Enable quad interrupts */ - err = ice_ptp_tx_ena_intr(pf, true, itr); + err = ice_ptp_cfg_phy_interrupt(pf, true, 1); if (err) goto err; } @@ -2813,7 +2813,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) { struct ice_hw *hw = &pf->hw; struct timespec64 ts; - int err, itr = 1; + int err; err = ice_ptp_init_phc(hw); if (err) { @@ -2856,7 +2856,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f); /* Enable quad interrupts */ - err = ice_ptp_tx_ena_intr(pf, true, itr); + err = ice_ptp_cfg_phy_interrupt(pf, true, 1); if (err) goto err_exit; }