From patchwork Thu Oct 5 16:28:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Nguyen X-Patchwork-Id: 13410426 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E24A33986 for ; Thu, 5 Oct 2023 16:35:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="lQjLEj3C" Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 383432D50 for ; Thu, 5 Oct 2023 09:33:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696523598; x=1728059598; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Zu+kqGR8pdYaHMrUL83wiemt6uq9PPX11K5xQOTh3Ac=; b=lQjLEj3CoZiOXgsMFgCSFtM/CNdpOeJtdIDwe/qXcn7KvXIsTidMmWO+ Iyk8kxQCXVFl9symYeZX3Wu9gxGO1Hy70pU8QWm0Lawc+oUBwSJREglmn oXFPg4BV4E+3N1cnwjINGbDwO2JW0OguRTkc0a5uW3b0rKFFZKNlNoPIn egMxEN455Ruc+DKpzix46wtRUvQHhNC3NTJG6FU2gTRRWv/Cx63WudU00 u5r+HPhpZ+BwVWziLla5esq595Pl1F4aMFIMRKc5XiRxB9vqmsQrfMhKY 4VdcrJzhpsMwVcvCj67Us4eW5rW/0eDgb5yTZ0n04WLvoQF+KUggvR26S A==; X-IronPort-AV: E=McAfee;i="6600,9927,10854"; a="2152656" X-IronPort-AV: E=Sophos;i="6.03,203,1694761200"; d="scan'208";a="2152656" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Oct 2023 09:29:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10854"; a="875607734" X-IronPort-AV: E=Sophos;i="6.03,203,1694761200"; d="scan'208";a="875607734" Received: from anguy11-upstream.jf.intel.com ([10.166.9.133]) by orsmga004.jf.intel.com with ESMTP; 05 Oct 2023 09:29:54 -0700 From: Tony Nguyen To: davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com, edumazet@google.com, netdev@vger.kernel.org Cc: Ivan Vecera , anthony.l.nguyen@intel.com, jacob.e.keller@intel.com, Przemek Kitszel , Jesse Brandeburg , Aleksandr Loktionov , Pucha Himasekhar Reddy Subject: [PATCH net-next 2/9] i40e: Move I40E_MASK macro to i40e_register.h Date: Thu, 5 Oct 2023 09:28:43 -0700 Message-Id: <20231005162850.3218594-3-anthony.l.nguyen@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20231005162850.3218594-1-anthony.l.nguyen@intel.com> References: <20231005162850.3218594-1-anthony.l.nguyen@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org From: Ivan Vecera The macro is practically used only in i40e_register.h header file except few I40E_MDIO_CLAUSE* macros that are defined in i40e_type.h Move I40E_MASK macro to i40e_register.h header, I40E_MDIO_CLAUSE* macros are refactored in subsequent patch. Signed-off-by: Ivan Vecera Reviewed-by: Przemek Kitszel Reviewed-by: Jesse Brandeburg Reviewed-by: Aleksandr Loktionov Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) Signed-off-by: Tony Nguyen --- drivers/net/ethernet/intel/i40e/i40e_register.h | 3 +++ drivers/net/ethernet/intel/i40e/i40e_type.h | 3 --- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/intel/i40e/i40e_register.h b/drivers/net/ethernet/intel/i40e/i40e_register.h index 7339003aa17c..eebb5735772b 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_register.h +++ b/drivers/net/ethernet/intel/i40e/i40e_register.h @@ -4,6 +4,9 @@ #ifndef _I40E_REGISTER_H_ #define _I40E_REGISTER_H_ +/* I40E_MASK is a macro used on 32 bit registers */ +#define I40E_MASK(mask, shift) ((u32)(mask) << (shift)) + #define I40E_GL_ATQLEN_ATQCRIT_SHIFT 30 #define I40E_GL_ATQLEN_ATQCRIT_MASK I40E_MASK(0x1, I40E_GL_ATQLEN_ATQCRIT_SHIFT) #define I40E_PF_ARQBAH 0x00080180 /* Reset: EMPR */ diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h index 658bc8913278..60b55d66d648 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_type.h +++ b/drivers/net/ethernet/intel/i40e/i40e_type.h @@ -11,9 +11,6 @@ #include "i40e_lan_hmc.h" #include "i40e_devids.h" -/* I40E_MASK is a macro used on 32 bit registers */ -#define I40E_MASK(mask, shift) ((u32)(mask) << (shift)) - #define I40E_MAX_VSI_QP 16 #define I40E_MAX_VF_VSI 4 #define I40E_MAX_CHAINED_RX_BUFFERS 5