Message ID | 20231121-ipq5332-nsscc-v2-4-a7ff61beab72@quicinc.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Series | Add NSS clock controller support for Qualcomm IPQ5332 | expand |
Context | Check | Description |
---|---|---|
netdev/tree_selection | success | Not a local patch |
diff --git a/include/dt-bindings/clock/qcom,ipq5332-gcc.h b/include/dt-bindings/clock/qcom,ipq5332-gcc.h index 4649026da332..486b6cf2e916 100644 --- a/include/dt-bindings/clock/qcom,ipq5332-gcc.h +++ b/include/dt-bindings/clock/qcom,ipq5332-gcc.h @@ -176,6 +176,7 @@ #define GCC_PCIE3X1_0_PIPE_CLK_SRC 170 #define GCC_PCIE3X1_1_PIPE_CLK_SRC 171 #define GCC_USB0_PIPE_CLK_SRC 172 +#define GPLL0_OUT_AUX 173 #define GCC_ADSS_BCR 0 #define GCC_ADSS_PWM_CLK_ARES 1