From patchwork Wed Nov 29 06:02:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ian Rogers X-Patchwork-Id: 13472228 X-Patchwork-Delegate: bpf@iogearbox.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="plg/BvyH" Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2D711BCF for ; Tue, 28 Nov 2023 22:02:34 -0800 (PST) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-5d0c4ba7081so38044797b3.0 for ; Tue, 28 Nov 2023 22:02:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1701237754; x=1701842554; darn=vger.kernel.org; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :from:to:cc:subject:date:message-id:reply-to; bh=VgvVWlesLuugbgRkTEvAvehfG8qq5p36CQo20xvLh64=; b=plg/BvyHeIdYw5/sTw/8O42pXvNpBZZ4xtGoLVCUiJ8muIkzDqGuBwIo95BlhMoKFP o/i3w6YTXdOnDTxRV/0RqWsZm1doL2DbJnJXxvjhVN/rkqy9j/FB0qds3WgYZ0wiJc9+ 36Q3FUJIMVZZuyaEvBd9T7YM8nNaFu2wip6TbRFCM5lMKpmKvaXmqL3sC9eyM31/ZNXw +PcvoJJDV/r6HB4n4V+Ubndu0hujzHDUnucFIp5H5nrcPARH7K1Jtk0lj4a21xEvx1Ta RcaIkHQqNrN3/RXdXd9fGyBYU3vaYlv6IF7qSr455Iq6b52U/Kbdhr2FPs0Dn/BXru3E JrMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701237754; x=1701842554; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=VgvVWlesLuugbgRkTEvAvehfG8qq5p36CQo20xvLh64=; b=J5OPqE/fLN0ZwS4y5N1ZsC2sGCGHRl4W7rtpnnf/joUQJaO5xpz2mGrOIz+ltS1Lco BNQEYgtRiFlp6MkcBbAFbGVyAKfrXHpiHuVeIvg3VW1fcTJwPodcI3cK+KPljO6EnQEk /+i1vogqLAi/xFr4xOCAM27wn5IAOZg6L6aGwgUvBIfOSQ75bYB10NXDNv0F92iyv16/ RJxVsxM5KDPtOpHEwfHI0GQJzRPWC+9AUWHqDR0sv8xYCXl9Ktk9ywUozb/aA4ltBzgm 2TBtaAmLSzQiay0/085PoSFAIDy2MsmR4s/N6wvIkysZFeWuAIg4cukz2efRcdeYR27p cMCA== X-Gm-Message-State: AOJu0YxcUk5S/b0RYOPrxlJs6YuLX6+jY7SYV1cNsM9Mdo26WYPpfHXu XTlAAJwxLLgjzh6fg9TVqhk+ieooJBAG X-Google-Smtp-Source: AGHT+IHNr4ejdtETuIXhfF0YTzQe2IWwh7lZHWr7MqF4UN0ZlhfgRrJfjgfRl1a5b9HrVLvNyeXWn4aGPi+3 X-Received: from irogers.svl.corp.google.com ([2620:15c:2a3:200:763b:80fa:23ca:96f8]) (user=irogers job=sendgmr) by 2002:a05:690c:2e10:b0:5cc:20a1:90e4 with SMTP id et16-20020a05690c2e1000b005cc20a190e4mr530191ywb.6.1701237753930; Tue, 28 Nov 2023 22:02:33 -0800 (PST) Date: Tue, 28 Nov 2023 22:02:05 -0800 In-Reply-To: <20231129060211.1890454-1-irogers@google.com> Message-Id: <20231129060211.1890454-9-irogers@google.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20231129060211.1890454-1-irogers@google.com> X-Mailer: git-send-email 2.43.0.rc1.413.gea7ed67945-goog Subject: [PATCH v1 08/14] perf intel-pt/intel-bts: Switch perf_cpu_map__has_any_cpu_or_is_empty use From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , Mike Leach , James Clark , Leo Yan , John Garry , Will Deacon , Thomas Gleixner , Darren Hart , Davidlohr Bueso , " =?utf-8?q?Andr=C3=A9_Almeida?= " , Kan Liang , K Prateek Nayak , Sean Christopherson , Paolo Bonzini , Kajol Jain , Athira Rajeev , Andrew Jones , Alexandre Ghiti , Atish Patra , "Steinar H. Gunderson" , Yang Jihong , Yang Li , Changbin Du , Sandipan Das , Ravi Bangoria , Paran Lee , Nick Desaulniers , Huacai Chen , Yanteng Si , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Switch perf_cpu_map__has_any_cpu_or_is_empty to perf_cpu_map__is_any_cpu_or_is_empty as a CPU map may contain CPUs as well as the dummy event and perf_cpu_map__is_any_cpu_or_is_empty is a more correct alternative. Signed-off-by: Ian Rogers --- tools/perf/arch/x86/util/intel-bts.c | 4 ++-- tools/perf/arch/x86/util/intel-pt.c | 10 +++++----- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/tools/perf/arch/x86/util/intel-bts.c b/tools/perf/arch/x86/util/intel-bts.c index af8ae4647585..34696f3d3d5d 100644 --- a/tools/perf/arch/x86/util/intel-bts.c +++ b/tools/perf/arch/x86/util/intel-bts.c @@ -143,7 +143,7 @@ static int intel_bts_recording_options(struct auxtrace_record *itr, if (!opts->full_auxtrace) return 0; - if (opts->full_auxtrace && !perf_cpu_map__has_any_cpu_or_is_empty(cpus)) { + if (opts->full_auxtrace && !perf_cpu_map__is_any_cpu_or_is_empty(cpus)) { pr_err(INTEL_BTS_PMU_NAME " does not support per-cpu recording\n"); return -EINVAL; } @@ -224,7 +224,7 @@ static int intel_bts_recording_options(struct auxtrace_record *itr, * In the case of per-cpu mmaps, we need the CPU on the * AUX event. */ - if (!perf_cpu_map__has_any_cpu_or_is_empty(cpus)) + if (!perf_cpu_map__is_any_cpu_or_is_empty(cpus)) evsel__set_sample_bit(intel_bts_evsel, CPU); } diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c index d199619df3ab..6de7e2d21075 100644 --- a/tools/perf/arch/x86/util/intel-pt.c +++ b/tools/perf/arch/x86/util/intel-pt.c @@ -369,7 +369,7 @@ static int intel_pt_info_fill(struct auxtrace_record *itr, ui__warning("Intel Processor Trace: TSC not available\n"); } - per_cpu_mmaps = !perf_cpu_map__has_any_cpu_or_is_empty(session->evlist->core.user_requested_cpus); + per_cpu_mmaps = !perf_cpu_map__is_any_cpu_or_is_empty(session->evlist->core.user_requested_cpus); auxtrace_info->type = PERF_AUXTRACE_INTEL_PT; auxtrace_info->priv[INTEL_PT_PMU_TYPE] = intel_pt_pmu->type; @@ -774,7 +774,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr, * Per-cpu recording needs sched_switch events to distinguish different * threads. */ - if (have_timing_info && !perf_cpu_map__has_any_cpu_or_is_empty(cpus) && + if (have_timing_info && !perf_cpu_map__is_any_cpu_or_is_empty(cpus) && !record_opts__no_switch_events(opts)) { if (perf_can_record_switch_events()) { bool cpu_wide = !target__none(&opts->target) && @@ -832,7 +832,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr, * In the case of per-cpu mmaps, we need the CPU on the * AUX event. */ - if (!perf_cpu_map__has_any_cpu_or_is_empty(cpus)) + if (!perf_cpu_map__is_any_cpu_or_is_empty(cpus)) evsel__set_sample_bit(intel_pt_evsel, CPU); } @@ -858,7 +858,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr, tracking_evsel->immediate = true; /* In per-cpu case, always need the time of mmap events etc */ - if (!perf_cpu_map__has_any_cpu_or_is_empty(cpus)) { + if (!perf_cpu_map__is_any_cpu_or_is_empty(cpus)) { evsel__set_sample_bit(tracking_evsel, TIME); /* And the CPU for switch events */ evsel__set_sample_bit(tracking_evsel, CPU); @@ -870,7 +870,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr, * Warn the user when we do not have enough information to decode i.e. * per-cpu with no sched_switch (except workload-only). */ - if (!ptr->have_sched_switch && !perf_cpu_map__has_any_cpu_or_is_empty(cpus) && + if (!ptr->have_sched_switch && !perf_cpu_map__is_any_cpu_or_is_empty(cpus) && !target__none(&opts->target) && !intel_pt_evsel->core.attr.exclude_user) ui__warning("Intel Processor Trace decoding will not be possible except for kernel tracing!\n");