From patchwork Tue Dec 5 06:13:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Saeed Mahameed X-Patchwork-Id: 13479416 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C81815EAE for ; Tue, 5 Dec 2023 06:13:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nn9mTBcM" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CE93BC433C9; Tue, 5 Dec 2023 06:13:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1701756831; bh=8O9wDMP14dZCYHfHI0CG1sDkCxt6e7Gh27bn5wxi/UY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nn9mTBcMW5tfrcO0Gp/QBqsa6cBzl1sVF2OVMwFHmLRgGMfAytFyu2rp5ioRI/zic +z1YWiXB1oRQm4YQZ7V8xbhqGwsCSU/LHYQyP5y8uV8qVz7IOvjym5C+/KeSil0ou+ wwCnpGvinS4ay642SsT8MOf0dBuXkNMsB9BRhWwlHtwDLtYVpLvSI+MxhDsVk/pzDB abJL+l386jpbz6P0JX2ASD/d03hgShfsWXNFnO4o/qSqP+dvrFVP5pCT8f5W+ht/I1 nnxV9TNcR7v7qUxsafNleVe1MoksbquiJ+qwcvQrexMSBFNB5v87pcei5sYx3NpQdk IU6WgGcPjmUsA== From: Saeed Mahameed To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet Cc: Saeed Mahameed , netdev@vger.kernel.org, Tariq Toukan , Moshe Shemesh , Shay Drory Subject: [net V2 12/14] net/mlx5: Nack sync reset request when HotPlug is enabled Date: Mon, 4 Dec 2023 22:13:25 -0800 Message-ID: <20231205061327.44638-13-saeed@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231205061327.44638-1-saeed@kernel.org> References: <20231205061327.44638-1-saeed@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Moshe Shemesh Current sync reset flow is not supported when PCIe bridge connected directly to mlx5 device has HotPlug interrupt enabled and can be triggered on link state change event. Return nack on reset request in such case. Fixes: 92501fa6e421 ("net/mlx5: Ack on sync_reset_request only if PF can do reset_now") Signed-off-by: Moshe Shemesh Reviewed-by: Shay Drory Signed-off-by: Saeed Mahameed --- .../ethernet/mellanox/mlx5/core/fw_reset.c | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c index b568988e92e3..c4e19d627da2 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c @@ -325,6 +325,29 @@ static void mlx5_fw_live_patch_event(struct work_struct *work) mlx5_core_err(dev, "Failed to reload FW tracer\n"); } +#if IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE) +static int mlx5_check_hotplug_interrupt(struct mlx5_core_dev *dev) +{ + struct pci_dev *bridge = dev->pdev->bus->self; + u16 reg16; + int err; + + if (!bridge) + return -EOPNOTSUPP; + + err = pcie_capability_read_word(bridge, PCI_EXP_SLTCTL, ®16); + if (err) + return err; + + if ((reg16 & PCI_EXP_SLTCTL_HPIE) && (reg16 & PCI_EXP_SLTCTL_DLLSCE)) { + mlx5_core_warn(dev, "FW reset is not supported as HotPlug is enabled\n"); + return -EOPNOTSUPP; + } + + return 0; +} +#endif + static int mlx5_check_dev_ids(struct mlx5_core_dev *dev, u16 dev_id) { struct pci_bus *bridge_bus = dev->pdev->bus; @@ -357,6 +380,12 @@ static bool mlx5_is_reset_now_capable(struct mlx5_core_dev *dev) return false; } +#if IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE) + err = mlx5_check_hotplug_interrupt(dev); + if (err) + return false; +#endif + err = pci_read_config_word(dev->pdev, PCI_DEVICE_ID, &dev_id); if (err) return false;