From patchwork Mon Dec 18 21:44:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13497604 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 737A8760B7; Mon, 18 Dec 2023 21:44:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="PVCpFCl8" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1702935897; bh=nwoZSeh1Kp6U1IUyUeb5W4P20NSggurGdjJI6k4fjo8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PVCpFCl8gkuWIT5cdjPAf0qmxh2DkMbJ5B037q75D7hmejM87S92KQjaD2Wv8SuL6 fz+hoBPM2lUW9ePjB8koMFfQbTqq37Q5o8QS4Qtn5RQw39/uSDj+SlmWb9Fu5y0wJY hTUpcrpU+XibOQpsVOgWnkuHQxwezCrZ/nrs4C7hkvAg136MdLbc/8+/php0Txw7NC s9S1xIsYQzg+qt3TkZhmuh9cKIi5dv8h/O3uVPy9vw49crXXleC2dYuCx6RkbC4VbT CJeJp0PW0jKoRwSWXLJJbgpEDdmTZU00rSvhmMBfLfxfkxvRSy8deYv0297Dr2ZKtX sWnQC/cvCbpNw== Received: from localhost (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madrid.collaboradmins.com (Postfix) with ESMTPSA id A96BB3781492; Mon, 18 Dec 2023 21:44:57 +0000 (UTC) From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Hal Feng , Michael Turquette , Stephen Boyd , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Emil Renner Berthing Subject: [PATCH v4 4/9] riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes Date: Mon, 18 Dec 2023 23:44:44 +0200 Message-ID: <20231218214451.2345691-5-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231218214451.2345691-1-cristian.ciocaltea@collabora.com> References: <20231218214451.2345691-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Provide the sysmain and gmac DT nodes supporting the DWMAC found on the StarFive JH7100 SoC. Co-developed-by: Emil Renner Berthing Signed-off-by: Emil Renner Berthing Signed-off-by: Cristian Ciocaltea --- arch/riscv/boot/dts/starfive/jh7100.dtsi | 36 ++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index c216aaecac53..2ebdebe6a81c 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -204,6 +204,37 @@ sdio1: mmc@10010000 { status = "disabled"; }; + gmac: ethernet@10020000 { + compatible = "starfive,jh7100-dwmac", "snps,dwmac"; + reg = <0x0 0x10020000 0x0 0x10000>; + clocks = <&clkgen JH7100_CLK_GMAC_ROOT_DIV>, + <&clkgen JH7100_CLK_GMAC_AHB>, + <&clkgen JH7100_CLK_GMAC_PTP_REF>, + <&clkgen JH7100_CLK_GMAC_TX_INV>, + <&clkgen JH7100_CLK_GMAC_GTX>; + clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "gtx"; + resets = <&rstgen JH7100_RSTN_GMAC_AHB>; + reset-names = "ahb"; + interrupts = <6>, <7>; + interrupt-names = "macirq", "eth_wake_irq"; + max-frame-size = <9000>; + snps,multicast-filter-bins = <32>; + snps,perfect-filter-entries = <128>; + starfive,syscon = <&sysmain 0x70 0>; + rx-fifo-depth = <32768>; + tx-fifo-depth = <16384>; + snps,axi-config = <&stmmac_axi_setup>; + snps,fixed-burst; + snps,force_thresh_dma_mode; + status = "disabled"; + + stmmac_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt = <16>; + snps,rd_osr_lmt = <16>; + snps,blen = <256 128 64 32 0 0 0>; + }; + }; + clkgen: clock-controller@11800000 { compatible = "starfive,jh7100-clkgen"; reg = <0x0 0x11800000 0x0 0x10000>; @@ -218,6 +249,11 @@ rstgen: reset-controller@11840000 { #reset-cells = <1>; }; + sysmain: syscon@11850000 { + compatible = "starfive,jh7100-sysmain", "syscon"; + reg = <0x0 0x11850000 0x0 0x10000>; + }; + i2c0: i2c@118b0000 { compatible = "snps,designware-i2c"; reg = <0x0 0x118b0000 0x0 0x10000>;