Message ID | 20231221093254.9599-5-lakshmi.sowjanya.d@intel.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | Add support for Intel PPS Generator | expand |
Context | Check | Description |
---|---|---|
netdev/tree_selection | success | Guessing tree name failed - patch did not apply |
On Thu, Dec 21, 2023 at 03:02:48PM +0530, lakshmi.sowjanya.d@intel.com wrote: > From: Thomas Gleixner <tglx@linutronix.de> > > Remove convert_art_to_tsc() function call, Pass system clock cycles and > clocksource ID as input to get_device_system_crosststamp(). ... > + return (struct system_counterval_t) { > + .cs_id = CSID_X86_ART, > + .cycles = tstamp, > + .nsecs = true, Either you should remove the extra spaces before '=' or replace them by TAB(s). > + };
diff --git a/drivers/net/ethernet/intel/igc/igc_ptp.c b/drivers/net/ethernet/intel/igc/igc_ptp.c index 928f38792203..11108eb075bc 100644 --- a/drivers/net/ethernet/intel/igc/igc_ptp.c +++ b/drivers/net/ethernet/intel/igc/igc_ptp.c @@ -911,7 +911,11 @@ static bool igc_is_crosststamp_supported(struct igc_adapter *adapter) static struct system_counterval_t igc_device_tstamp_to_system(u64 tstamp) { #if IS_ENABLED(CONFIG_X86_TSC) && !defined(CONFIG_UML) - return convert_art_ns_to_tsc(tstamp); + return (struct system_counterval_t) { + .cs_id = CSID_X86_ART, + .cycles = tstamp, + .nsecs = true, + }; #else return (struct system_counterval_t) { }; #endif