From patchwork Wed Jan 3 14:28:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13510121 X-Patchwork-Delegate: kuba@kernel.org Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E2791A5A6; Wed, 3 Jan 2024 14:28:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="PjkXE8zV" Received: by mail.gandi.net (Postfix) with ESMTPSA id D3ABE60006; Wed, 3 Jan 2024 14:28:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1704292102; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yi/l6zN1wrokE9qEz9TLn6vcJko+Bnseka46HyXgyU4=; b=PjkXE8zV+hyPTh8jtSX8pVHB1Rto9Ayqaet+5qq1/JUSrwutQmvqOcPDB+ZknY6SrSwSna i3cLoBqrLCd4AJPJE4qdOcaJcqpPgbGJyyHduLtkEojAH21k/fdjghBbAr+XuQxpt6hq/6 zzKkYaaOjPjYMjax1X6mEFux2vheRcTyfnmH0d8BYqa0drrZzEnAV/UHU9ON6NUQoQ3Nyd bEs1zWjyP0NQHvQF19r26RdIYWJN76MnGGcjGn8L91Oaf3Ks/gDmS+zYqEYRxEU/v4T1cA hH1YDeA+Dmy2PLY1iSQXUWlbtwngc6qNxTS8IbqAmgAKlGj5SkI/NSUU3R3hfQ== From: Romain Gantois To: Alexandre Torgue , Jose Abreu , Russell King , Andrew Lunn , Jakub Kicinski , Heiner Kallweit Cc: Romain Gantois , "David S. Miller" , Eric Dumazet , Paolo Abeni , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Marek Vasut , Clark Wang , Miquel Raynal , Sylvain Girard , Pascal EBERHARD , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH net 2/5] net: phy: add rxc_always_on flag to phylink_pcs Date: Wed, 3 Jan 2024 15:28:22 +0100 Message-ID: <20240103142827.168321-3-romain.gantois@bootlin.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240103142827.168321-1-romain.gantois@bootlin.com> References: <20240103142827.168321-1-romain.gantois@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: romain.gantois@bootlin.com X-Patchwork-Delegate: kuba@kernel.org Some MAC drivers (e.g. stmmac) require a continuous receive clock signal to be generated by a PCS that is handled by a standalone PCS driver. Such a PCS driver does not have access to a PHY device, thus cannot check the PHY_F_RXC_ALWAYS_ON flag. They cannot check max_requires_rxc in the phylink config either, since it is a private member. Therefore, a new flag is needed to signal to the PCS that it should keep the RX clock signal up at all times. Signed-off-by: Romain Gantois --- drivers/net/phy/phylink.c | 3 +++ include/linux/phylink.h | 5 +++++ 2 files changed, 8 insertions(+) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index f26b13d916d4..a5a5fe91d213 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -663,6 +663,9 @@ static int phylink_validate_mac_and_pcs(struct phylink *pl, return -EINVAL; } + if (pl->config->mac_requires_rxc) + pcs->rxc_always_on = true; + /* Validate the link parameters with the PCS */ if (pcs->ops->pcs_validate) { ret = pcs->ops->pcs_validate(pcs, supported, state); diff --git a/include/linux/phylink.h b/include/linux/phylink.h index 8430ac7ead11..e1527e35f997 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -462,6 +462,10 @@ struct phylink_pcs_ops; * @phylink: pointer to &struct phylink_config * @neg_mode: provide PCS neg mode via "mode" argument * @poll: poll the PCS for link changes + * @rxc_always_on: The MAC driver requires the reference clock + * to always be on. Standalone PCS drivers who + * do not have access to a PHY device can check + * this instead of PHY_F_RXC_ALWAYS_ON. * * This structure is designed to be embedded within the PCS private data, * and will be passed between phylink and the PCS. @@ -474,6 +478,7 @@ struct phylink_pcs { struct phylink *phylink; bool neg_mode; bool poll; + bool rxc_always_on; }; /**