From patchwork Wed Jan 17 10:28:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 13521588 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C42AC1DDC8; Wed, 17 Jan 2024 10:29:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705487347; cv=none; b=ZafIEHpk14G4S0/AN+OF7JXZqBYBkbI8WdJZ104HFcxq4cqPqL7bF9kl86o5vNDtLAa8N9SSXXljDD9RBFnqJbiLJPM0Gg3OIHGlKjyjKaMKvJsJS7q6CnSAga6F14bYXoVW/XFJAvKlJs+HzYkScggpPG5hOcnACACbvB9IfZI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705487347; c=relaxed/simple; bh=fn/GJyMwTt+UK9FTMORdK7KeF7Ng/MbdAFIOD30iFgQ=; h=Received:DKIM-Signature:From:To:Cc:Subject:Date:Message-Id: X-Mailer:In-Reply-To:References:MIME-Version:Content-Type: Content-Transfer-Encoding:X-GND-Sasl; b=XydulKR5aso1biq5G3j76fAk4cBJeQInMnnBe8DTnbYKTLnZM2Hl+Xd2vBlloyo4xbjXOReTvZ2UWXHJZ7QZukK+gPLV9zGv2GPRpSTXJGW8eNuvcwT1H2FIFWkadDoMRR5EhySWkNjbXSk/0Yl5zvtfYtzUvV7ZQ4XGYbvAfXs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com; spf=pass smtp.mailfrom=arinc9.com; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b=N32HXSuy; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arinc9.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b="N32HXSuy" Received: by mail.gandi.net (Postfix) with ESMTPSA id DC18C40011; Wed, 17 Jan 2024 10:28:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1705487343; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zfeP++ce84dD1NKgVgvHGZi5163rCfdKWO3hg8LgOVI=; b=N32HXSuy1FlHbm8WyQDHEDDv+uuPBFcXr2Bi+LQhw2GFP3ElffuZ/Xiv3dXLDxgp6aS9N7 UMzFd4ZwST898UyPfVXPpCcdmqAOrlJoTOER5tSGNFSiockd2+WkceaWkBlIF93/dqsLws GG+wLuxlSOQj5ZpbMnsjbP3eWvkkGVi6DlLvESr1Si4pFc1iZOCGUKJNnZgyl2hVBpAzIp R95oluJ7Hdp3vEP4gGYMVBVZhpBabXsNQXvZwtFtMjjXQinyU/gyawz1ZegFqcucszBWmg /jEEF9YsZHKV9Ly5sh3nXk5kHct1271wv4izVbcGH5Vg8YgbHuGkh5C4kqi6vQ== From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= To: Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 3/8] net: dsa: mt7530: do not use SW_PHY_RST to reset MT7531 switch Date: Wed, 17 Jan 2024 13:28:33 +0300 Message-Id: <20240117102838.57445-4-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117102838.57445-1-arinc.unal@arinc9.com> References: <20240117102838.57445-1-arinc.unal@arinc9.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: arinc.unal@arinc9.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC According to the document MT7531 Reference Manual for Development Board v1.0, the SW_PHY_RST bit on the SYS_CTRL register doesn't exist for MT7531. This is likely why forcing link down on all ports is necessary for MT7531. Therefore, do not set SW_PHY_RST on mt7531_setup(). Signed-off-by: Arınç ÜNAL --- drivers/net/dsa/mt7530.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index d2e861361191..a43178b62817 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2434,14 +2434,12 @@ mt7531_setup(struct dsa_switch *ds) val = mt7530_read(priv, MT7531_TOP_SIG_SR); priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN); - /* all MACs must be forced link-down before sw reset */ + /* Force link down on all ports before internal reset */ for (i = 0; i < MT7530_NUM_PORTS; i++) mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); /* Reset the switch through internal reset */ - mt7530_write(priv, MT7530_SYS_CTRL, - SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | - SYS_CTRL_REG_RST); + mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_SW_RST | SYS_CTRL_REG_RST); if (!priv->p5_sgmii) { mt7531_pll_setup(priv);