From patchwork Wed Jan 17 16:14:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Diogo Ivo X-Patchwork-Id: 13521998 X-Patchwork-Delegate: kuba@kernel.org Received: from mta-64-226.siemens.flowmailer.net (mta-64-226.siemens.flowmailer.net [185.136.64.226]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C632A2261F for ; Wed, 17 Jan 2024 16:16:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.136.64.226 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705508182; cv=none; b=m0nF2n+jJS0hMWhuJTwHnHvK6OPeYQjwM7Dsf+O0ByueRdoj3iAHqtnCEIAeXFMobmSGi5MScH5Oii8rvlyDeN4UmaJ8jwZOWbat3f2VXVnmwkyqsEjOoo7S/sefhnLhFO5j/fJd4lPKxAHtOSFR666OHDK6zC+TBavSOsExPM8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705508182; c=relaxed/simple; bh=J3au/2qdURmFt1LdWjQhvh59l0TLId2dpn1yD/BHtqo=; h=Received:DKIM-Signature:From:To:Cc:Subject:Date:Message-ID: In-Reply-To:References:MIME-Version:Content-Transfer-Encoding: X-Flowmailer-Platform:Feedback-ID; b=U+V/R+PIIfjc3rzqu02vCuth035brzz0m272mu111vHnwjHqyzzoX+r2XFExkEVpz6yVMex8bSuKK6KkuOQ0lM2li7TD4FgLwcD2/6Um2gn3bVTe01wiQu4fCDLPHjGmcUFkQkn8sGzG2acmIyTkXdh60pENR0+VYHpKxuIND4A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com; dkim=pass (1024-bit key) header.d=siemens.com header.i=diogo.ivo@siemens.com header.b=D+xPTTq+; arc=none smtp.client-ip=185.136.64.226 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=siemens.com header.i=diogo.ivo@siemens.com header.b="D+xPTTq+" Received: by mta-64-226.siemens.flowmailer.net with ESMTPSA id 2024011716161824050fb63bb0690b03 for ; Wed, 17 Jan 2024 17:16:18 +0100 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=diogo.ivo@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=8sQbeCmWiLFomVY+kxivPzriHLrsmhcfUL/M14qU9XY=; b=D+xPTTq+kJgdiDaBd/RCyNFUCHCybBewfRG1z/fBApLFIhTmLhoXZm4c3v5Mzle0BA0VW5 hNRQ2J8IRR/MmLAtI5Ud/WdRBb6cTB70Tjs/VS8meckoXIHRwzv+/8C25oVE+obsBz1gpRfP 8b69oi04Ot4vHol2GolTqyP4tU9eM=; From: Diogo Ivo To: danishanwar@ti.com, rogerq@kernel.org, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, andrew@lunn.ch, grygorii.strashko@ti.com, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org Cc: Diogo Ivo , Jan Kiszka Subject: [PATCH v2 3/8] net: ti: icssg-prueth: add SR1.0-specific configuration bits Date: Wed, 17 Jan 2024 16:14:57 +0000 Message-ID: <20240117161602.153233-4-diogo.ivo@siemens.com> In-Reply-To: <20240117161602.153233-1-diogo.ivo@siemens.com> References: <20240117161602.153233-1-diogo.ivo@siemens.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-1320519:519-21489:flowmailer X-Patchwork-Delegate: kuba@kernel.org Add fields to differentiate between SR1.0 and SR2.0 in the driver as well as the structures necessary to program SR1.0. Based on the work of Roger Quadros in TI's 5.10 SDK [1]. [1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/?h=ti-linux-5.10.y Co-developed-by: Jan Kiszka Signed-off-by: Jan Kiszka Signed-off-by: Diogo Ivo --- drivers/net/ethernet/ti/icssg/icssg_prueth.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/net/ethernet/ti/icssg/icssg_prueth.h b/drivers/net/ethernet/ti/icssg/icssg_prueth.h index 8b6d6b497010..1bdd3d301fde 100644 --- a/drivers/net/ethernet/ti/icssg/icssg_prueth.h +++ b/drivers/net/ethernet/ti/icssg/icssg_prueth.h @@ -127,6 +127,7 @@ struct prueth_rx_chn { /* data for each emac port */ struct prueth_emac { + bool is_sr1; bool fw_running; struct prueth *prueth; struct net_device *ndev; @@ -155,6 +156,10 @@ struct prueth_emac { int rx_flow_id_base; int tx_ch_num; + /* SR1.0 Management channel */ + struct prueth_rx_chn rx_mgm_chn; + int rx_mgm_flow_id_base; + spinlock_t lock; /* serialize access */ /* TX HW Timestamping */ @@ -182,10 +187,12 @@ struct prueth_emac { * struct prueth_pdata - PRUeth platform data * @fdqring_mode: Free desc queue mode * @quirk_10m_link_issue: 10M link detect errata + * @is_sr1: device is SR1.0 */ struct prueth_pdata { enum k3_ring_mode fdqring_mode; u32 quirk_10m_link_issue:1; + u32 is_sr1:1; }; /** @@ -224,6 +231,7 @@ struct prueth { struct device_node *eth_node[PRUETH_NUM_MACS]; struct prueth_emac *emac[PRUETH_NUM_MACS]; struct net_device *registered_netdevs[PRUETH_NUM_MACS]; + struct icssg_config_sr1 config[PRUSS_NUM_PRUS]; struct regmap *miig_rt; struct regmap *mii_rt; @@ -236,6 +244,13 @@ struct prueth { struct icss_iep *iep1; }; +struct emac_tx_ts_response_sr1 { + u32 lo_ts; + u32 hi_ts; + u32 reserved; + u32 cookie; +}; + struct emac_tx_ts_response { u32 reserved[2]; u32 cookie;