From patchwork Tue Jan 23 10:51:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Karol Kolacinski X-Patchwork-Id: 13527230 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 082065D754 for ; Tue, 23 Jan 2024 10:51:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706007121; cv=none; b=GW7P6dCHod7FiymG354n+Jvp8mHScTPMSKwYAc9AgoxyZIqn8ohelTDyYlkNdtxcBcr1PTaUtooflW5aQVRc9SaGFB/JZive4RgCAmQdYBdiVBY14+30ffvYxx1qbrbhzB8mGLiu7C2ZLG9CV5sVaMQFDeQGyBa9RKY3oR61pS8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706007121; c=relaxed/simple; bh=mw+LQ+tfDJ3i9Mdu1+gnRTqn6EyfBM3pRIDtFd6F7/U=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=IlDSep8D7CEy0AZfd6vOWoNrQtS3zDehJClLmTymIvvqdowYIlBDYIp49OHzSrbyucgapx9AUEf54rhSObWsx6mmv7ZM39yuS7qb94WSTHxozFMb1AjOBrlBq087faM6jQ7i7LWo0Y0bwvdzZccKXCQYu3iRu8gBgHaZMucTXtw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Jh773jkL; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Jh773jkL" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706007120; x=1737543120; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mw+LQ+tfDJ3i9Mdu1+gnRTqn6EyfBM3pRIDtFd6F7/U=; b=Jh773jkLdkA20ZxBhzHrXD1px1Z3tyaoHlXzqKt/l0ygBRFunMuX1PKz Jly1SWFI4SM6EWYgXbRuu+n3R3AKdEQJJKa5wPgSn+u91E2fbXbLh0GpN Bky/H26teOLQYtE8VJt0i8sWoXFGnI0+8zPK87atawEPWs94OJpKmCS88 Eaf0/Suxa3qBAhpe7j2MRBCjVpeEatA6s2hdtFM2TQfULXYmHvHUytfaO SiyFZzLVt2U6z320c8nmpWdsMqzxILRT+EKWuoHu4TnLEHsdcWQi9BPrR GbMLWbsfR8Rys6d6WPLVXXCMVRXpedzvD6caH05vfLkjrrvCEGkkQBMAT w==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="8877613" X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="8877613" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2024 02:51:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="34365384" Received: from kkolacin-desk1.igk.intel.com ([10.102.102.152]) by orviesa001.jf.intel.com with ESMTP; 23 Jan 2024 02:51:57 -0800 From: Karol Kolacinski To: intel-wired-lan@lists.osuosl.org Cc: netdev@vger.kernel.org, anthony.l.nguyen@intel.com, jesse.brandeburg@intel.com, Jacob Keller , Karol Kolacinski Subject: [PATCH v7 iwl-next 3/7] ice: rename verify_cached to has_ready_bitmap Date: Tue, 23 Jan 2024 11:51:27 +0100 Message-Id: <20240123105131.2842935-4-karol.kolacinski@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240123105131.2842935-1-karol.kolacinski@intel.com> References: <20240123105131.2842935-1-karol.kolacinski@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Jacob Keller The tx->verify_cached flag is used to inform the Tx timestamp tracking code whether it needs to verify the cached Tx timestamp value against a previous captured value. This is necessary on E810 hardware which does not have a Tx timestamp ready bitmap. In addition, we currently rely on the fact that the ice_get_phy_tx_tstamp_ready() function returns all 1s for E810 hardware. Instead of introducing a brand new flag, rename and verify_cached to has_ready_bitmap, inverting the relevant checks. Signed-off-by: Jacob Keller Signed-off-by: Karol Kolacinski Reviewed-by: Jacob Keller Reviewed-by: Simon Horman Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) --- V6 -> V7: renamed one missed verify_cached V5 -> V6: split the patch and left only rename part here drivers/net/ethernet/intel/ice/ice_ptp.c | 12 ++++++------ drivers/net/ethernet/intel/ice/ice_ptp.h | 8 +++++--- 2 files changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index 96b5f992f127..a10e0018b2e2 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -606,11 +606,11 @@ void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) * timestamp. If it is not, skip this for now assuming it hasn't yet * been captured by hardware. */ - if (!drop_ts && tx->verify_cached && + if (!drop_ts && !tx->has_ready_bitmap && raw_tstamp == tx->tstamps[idx].cached_tstamp) return; - if (tx->verify_cached && raw_tstamp) + if (!tx->has_ready_bitmap && raw_tstamp) tx->tstamps[idx].cached_tstamp = raw_tstamp; clear_bit(idx, tx->in_use); skb = tx->tstamps[idx].skb; @@ -751,7 +751,7 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) * from the last cached timestamp. If it is not, skip this for * now assuming it hasn't yet been captured by hardware. */ - if (!drop_ts && tx->verify_cached && + if (!drop_ts && !tx->has_ready_bitmap && raw_tstamp == tx->tstamps[idx].cached_tstamp) continue; @@ -761,7 +761,7 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) skip_ts_read: spin_lock_irqsave(&tx->lock, flags); - if (tx->verify_cached && raw_tstamp) + if (!tx->has_ready_bitmap && raw_tstamp) tx->tstamps[idx].cached_tstamp = raw_tstamp; clear_bit(idx, tx->in_use); skb = tx->tstamps[idx].skb; @@ -1014,7 +1014,7 @@ ice_ptp_init_tx_e82x(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port) tx->block = port / ICE_PORTS_PER_QUAD; tx->offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E82X; tx->len = INDEX_PER_PORT_E82X; - tx->verify_cached = 0; + tx->has_ready_bitmap = 1; return ice_ptp_alloc_tx_tracker(tx); } @@ -1037,7 +1037,7 @@ ice_ptp_init_tx_e810(struct ice_pf *pf, struct ice_ptp_tx *tx) * verify new timestamps against cached copy of the last read * timestamp. */ - tx->verify_cached = 1; + tx->has_ready_bitmap = 0; return ice_ptp_alloc_tx_tracker(tx); } diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h index afe454abe997..aa7a5588d11d 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.h +++ b/drivers/net/ethernet/intel/ice/ice_ptp.h @@ -100,7 +100,7 @@ struct ice_perout_channel { * the last timestamp we read for a given index. If the current timestamp * value is the same as the cached value, we assume a new timestamp hasn't * been captured. This avoids reporting stale timestamps to the stack. This is - * only done if the verify_cached flag is set in ice_ptp_tx structure. + * only done if the has_ready_bitmap flag is not set in ice_ptp_tx structure. */ struct ice_tx_tstamp { struct sk_buff *skb; @@ -130,7 +130,9 @@ enum ice_tx_tstamp_work { * @init: if true, the tracker is initialized; * @calibrating: if true, the PHY is calibrating the Tx offset. During this * window, timestamps are temporarily disabled. - * @verify_cached: if true, verify new timestamp differs from last read value + * @has_ready_bitmap: if true, the hardware has a valid Tx timestamp ready + * bitmap register. If false, fall back to verifying new + * timestamp values against previously cached copy. * @last_ll_ts_idx_read: index of the last LL TS read by the FW */ struct ice_ptp_tx { @@ -143,7 +145,7 @@ struct ice_ptp_tx { u8 len; u8 init : 1; u8 calibrating : 1; - u8 verify_cached : 1; + u8 has_ready_bitmap : 1; s8 last_ll_ts_idx_read; };