@@ -279,10 +279,26 @@ static int miic_validate(struct phylink_pcs *pcs, unsigned long *supported,
return -EINVAL;
}
+static int miic_pre_init(struct phylink_pcs *pcs,
+ phy_interface_t interface)
+{
+ int ret = 0;
+
+ /* Start RX clock if required */
+ if (pcs->rxc_always_on) {
+ ret = miic_config(pcs, 0, interface, NULL, false);
+ if (ret)
+ pr_err("Error: Failed to init RX clock in RZN1 MIIC PCS!");
+ }
+
+ return ret;
+}
+
static const struct phylink_pcs_ops miic_phylink_ops = {
.pcs_validate = miic_validate,
.pcs_config = miic_config,
.pcs_link_up = miic_link_up,
+ .pcs_pre_init = miic_pre_init,
};
struct phylink_pcs *miic_create(struct device *dev, struct device_node *np)
The GMAC1 controller in the RZN1 IP requires the RX MII clock signal to be started before it initializes its own hardware, thus before it calls phylink_start. Check the rxc_always_on pcs flag and enable the clock signal during the link validation phase. Reported-by: Clément Léger <clement.leger@bootlin.com> Link: https://lore.kernel.org/linux-arm-kernel/20230116103926.276869-4-clement.leger@bootlin.com/ Signed-off-by: Romain Gantois <romain.gantois@bootlin.com> --- drivers/net/pcs/pcs-rzn1-miic.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)