From patchwork Sun Feb 4 16:34:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 13544732 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 651322374E; Sun, 4 Feb 2024 16:34:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707064492; cv=none; b=XL/Ssxc0wdSu9uAJvPHuVI2RE32VvG33KnotzH5PCGob6IJQjVfWJS6YnV+pLM2Li00D6SXwp6zu2x38Ixiz96LmcZdlsNF1BuH4sURUnb1ydoKHjoKA3HRFwmr4M7NcnIV8xu+oQz7kjr7ZjEstBt1jzIOSY/SfJYvfh69Dwew= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707064492; c=relaxed/simple; bh=UiB7b9R8HzxacCmpjMHE6NnCO6Y1sX/piDLjud+k0Gw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=enZh4/zkFUybPz8GodHbm0FWZegUNzlsu8JFpT/ZMC3m7+JbLYoBM4GsltUGEV0/1sDEH+SuhKNNjZymXyaGbtqYN0UA/DsfI/FCOoJn8ylXFQq8JQTEIyOqTpDH2rSuWfJ7SajO27bkE6g8f6BIOpamtLZdmBnoU9qAGE9B6DA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=tSwbfCeY; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tSwbfCeY" Received: by smtp.kernel.org (Postfix) with ESMTPS id 0FD03C43601; Sun, 4 Feb 2024 16:34:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707064492; bh=UiB7b9R8HzxacCmpjMHE6NnCO6Y1sX/piDLjud+k0Gw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=tSwbfCeYQIu/7HpF2Q+RSx9vkkNg6ZVnHzMuFnNLvtD3PkMOxN32+Ad3HQqCU7m4d mJ1IkVFwtmi1yRCisA3krLiFnZitdjzsuqvN/Fywb18GI/Zt8z2huRP4z23iiGS77Z +g/NWWvM9R6sM0DXiV7WlyepKA5jITzzjy2SAPNKLCMRknyZYRZcqQzmbWeez559fy aZMHSBF+9c0zaryNDXIZ3rYeLMgWVezqRqPYiiKDJA4osA/IBTJLB2gC44KetlY5Sq gZcqNpNHMLOZrtUhPKvcCtXgFyzRInbo6QA3dXIkvXw073PpqUKRCzfXyf3FUlyrTp iBeavLp0Wm8Lg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0070C48286; Sun, 4 Feb 2024 16:34:51 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= via B4 Relay Date: Sun, 04 Feb 2024 19:34:24 +0300 Subject: [PATCH net-next v4 6/7] net: dsa: mt7530: correct port capabilities of MT7988 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240204-for-netnext-mt7530-improvements-2-v4-6-02bf0abaadb8@arinc9.com> References: <20240204-for-netnext-mt7530-improvements-2-v4-0-02bf0abaadb8@arinc9.com> In-Reply-To: <20240204-for-netnext-mt7530-improvements-2-v4-0-02bf0abaadb8@arinc9.com> To: Daniel Golle , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1707064489; l=1134; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=rcHiOfH2z15A2hleGudKrgg4oqBXeEUj1LqzdHrVmY0=; b=Yd7wt8CwbJbExv+irGL0enlVxMAxpjsbIq9VDwYorYK4Xkgy8+h1Psf83YuOCrTJKi0B9coJK XkKlNm81dZyA1E27s9tzSge0ekkZ0ZW3PUvbO4sHdRg7BHCPonAfYRj X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-Patchwork-Delegate: kuba@kernel.org From: Arınç ÜNAL On the switch on the MT7988 SoC, as shown in Block Diagram 8.1.1.3 on page 125 of "MT7988A Wi-Fi 7 Generation Router Platform: Datasheet (Open Version) v0.1", there are only 4 PHYs. That's port 0 to 3. Set the case for ports which connect to switch PHYs to '0 ... 3'. Port 4 and 5 are not used at all in this design. Link: https://wiki.banana-pi.org/Banana_Pi_BPI-R4#Documents [1] Acked-by: Daniel Golle Reviewed-by: Vladimir Oltean Signed-off-by: Arınç ÜNAL --- drivers/net/dsa/mt7530.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 8a6312b3bb06..08d5d7dd5969 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2577,7 +2577,7 @@ static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, switch (port) { /* Ports which are connected to switch PHYs. There is no MII pinout. */ - case 0 ... 4: + case 0 ... 3: __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); break;