From patchwork Thu Feb 8 05:51:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 13549329 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B7A467C60; Thu, 8 Feb 2024 05:51:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707371493; cv=none; b=Xn44Ksitim9urRkkOo3EqlmRT4j6erYxA9ZTpADVeQ6GDlyvg37c3peTenaukRIGopjp86ZAZl2dJ2gPyRVxgyHUyhwc+9ER2IonT/kEME6U5AwxOgia/cH86JHvdFK11z9HxYoyTL7u+Sbo5rUK2yFgas9d5LJy71yfdIUiW+8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707371493; c=relaxed/simple; bh=SU+tK2MlpgkdVnVhaHn0UQcoIzpj8l2UDGxN8QSA/B4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kWVEg5+fJLkZ+3PIC65hdIelWqzT5ESquQx5mUD4TFB+DEQoHfnY7XvaNCuy3V11+KYlgRkJf7qN0z7ekiAdoXD3l9Wmd70OEazED0Z9Eku5rOXt1G19CcfJcCVVWbX3oC319BNR1A87WDEEskwTtrggFM9JxoJ0fPs8rhtoQX8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dqnH2OzT; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dqnH2OzT" Received: by smtp.kernel.org (Postfix) with ESMTPS id 32F86C43390; Thu, 8 Feb 2024 05:51:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707371493; bh=SU+tK2MlpgkdVnVhaHn0UQcoIzpj8l2UDGxN8QSA/B4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=dqnH2OzT+hCRvXizdoX9qn8XTeMqqfS/LSEAyWVjjPQiy1hfWJxEuesWaJzgj+V/j dJFcDEpzmeJZqCCZJI6PVyHKJYZsIwr4OAgBaAymUmYRC0YNP2ocvSK4yc+devTXVv 43v8JbV+4LQaFq7ol6xRhhWfSuDxqbVDcKYnni2tPk6BHAmTnACeZ5Th8uuan/lMWc N60h2okhFXG8TZ/L+2qNy4pq18U9BaWn/4QfGHQ5WtgIuzKRRIp/y1V5BRwyxZDtUe cubk3E8B5u6ji5abcOloBS87ptjqC22AEou8acce/GRaCNTDXSas5EmBghfWGznT22 JDIzWFzCzx0JA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F48FC4829E; Thu, 8 Feb 2024 05:51:33 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= via B4 Relay Date: Thu, 08 Feb 2024 08:51:30 +0300 Subject: [PATCH netnext 2/8] net: dsa: mt7530: set interrupt register only for MT7530 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240208-for-netnext-mt7530-improvements-3-v1-2-d7c1cfd502ca@arinc9.com> References: <20240208-for-netnext-mt7530-improvements-3-v1-0-d7c1cfd502ca@arinc9.com> In-Reply-To: <20240208-for-netnext-mt7530-improvements-3-v1-0-d7c1cfd502ca@arinc9.com> To: Daniel Golle , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1707371489; l=921; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=JV5lkSoAmKAO6vEQKKvFpHOlOFc0GQ6XMI05UOpapU0=; b=gVJzgC1rkRFswBLSwsGE9zAoA7gaHsrqPDBpHSaPRlfz3WAEM9kFoZLOs1dYjje6uA30WLr92 ckaRwet1UcuAyBDO9o/b453+4N++G5PYpr0BUe+/xfNbcWUH5145IRI X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-Patchwork-Delegate: kuba@kernel.org From: Arınç ÜNAL Setting this register related to interrupts is only needed for the MT7530 switch. Make an exclusive check to ensure this. Signed-off-by: Arınç ÜNAL Acked-by: Daniel Golle Tested-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 94d4b2c87799..5cfd303b773f 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2055,7 +2055,7 @@ mt7530_setup_irq(struct mt7530_priv *priv) } /* This register must be set for MT7530 to properly fire interrupts */ - if (priv->id != ID_MT7531) + if (priv->id == ID_MT7530 || priv->id == ID_MT7621) mt7530_set(priv, MT7530_TOP_SIG_CTRL, TOP_SIG_CTRL_NORMAL); ret = request_threaded_irq(priv->irq, NULL, mt7530_irq_thread_fn,