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(cpe-109-60-82-27.zg3.cable.xnet.hr. [109.60.82.27]) by smtp.googlemail.com with ESMTPSA id cx3-20020a170907168300b00a3c488d79b1sm1571670ejd.223.2024.02.11.10.17.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Feb 2024 10:17:34 -0800 (PST) From: Robert Marko To: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, ansuelsmth@gmail.com, rmk+kernel@armlinux.org.uk, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH net-next] net: phy: aquantia: clear PMD Global Transmit Disable bit during init Date: Sun, 11 Feb 2024 19:16:41 +0100 Message-ID: <20240211181732.646311-1-robimarko@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org PMD Global Transmit Disable bit should be cleared for normal operation. This should be HW default, however I found that on Asus RT-AX89X that uses AQR113C PHY and firmware 5.4 this bit is set by default. With this bit set the AQR cannot achieve a link with its link-partner and it took me multiple hours of digging through the vendor GPL source to find this out, so lets always clear this bit during .config_init() to avoid a situation like this in the future. Signed-off-by: Robert Marko Reviewed-by: Andrew Lunn --- drivers/net/phy/aquantia/aquantia_main.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c index 97a2fafa15ca..e1f092cbfdce 100644 --- a/drivers/net/phy/aquantia/aquantia_main.c +++ b/drivers/net/phy/aquantia/aquantia_main.c @@ -727,6 +727,15 @@ static int aqr113c_config_init(struct phy_device *phydev) if (ret < 0) return ret; + ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, + MDIO_PMD_TXDIS_GLOBAL); + if (ret) + return ret; + + ret = aqr107_wait_processor_intensive_op(phydev); + if (ret) + return ret; + return aqr107_fill_interface_modes(phydev); }