diff mbox series

phy: lynx-28g: use read_poll_timeout when waiting for halt/reset bits

Message ID 20240218-lynx28g-infinite-loop-v1-1-59cc5cef8367@solid-run.com (mailing list archive)
State Not Applicable
Headers show
Series phy: lynx-28g: use read_poll_timeout when waiting for halt/reset bits | expand

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Context Check Description
netdev/series_format warning Single patches do not need cover letters; Target tree name not specified in the subject
netdev/tree_selection success Guessed tree name to be net-next
netdev/ynl success Generated files up to date; no warnings/errors; no diff in generated;
netdev/fixes_present success Fixes tag not required for -next series
netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 940 this patch: 940
netdev/build_tools success No tools touched, skip
netdev/cc_maintainers success CCed 5 of 5 maintainers
netdev/build_clang success Errors and warnings before: 957 this patch: 957
netdev/verify_signedoff success Signed-off-by tag matches author and committer
netdev/deprecated_api success None detected
netdev/check_selftest success No net selftest shell script
netdev/verify_fixes success No Fixes tag
netdev/build_allmodconfig_warn success Errors and warnings before: 957 this patch: 957
netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 66 lines checked
netdev/build_clang_rust success No Rust files in patch. Skipping build
netdev/kdoc success Errors and warnings before: 0 this patch: 0
netdev/source_inline success Was 0 now: 0
netdev/contest success net-next-2024-02-19--18-00 (tests: 1449)

Commit Message

Josua Mayer Feb. 18, 2024, 2:09 p.m. UTC 
Power-on and -off functions set and wait for self-clearing reset-
and halt-bits in serdes registers.
In certain operating conditions these bits may not actually clear.

Replace the infinite while-loops with read_poll_timeout to ensure that
power_on and power_off will always return even when the bits did not
clear within a full second.

On timeout print an error message and return error code.
In this situation the serdes lane has an invalid state,
without no known recovery procedure.

This fixes an infinite loop / hang during boot observed on a
misconfigured lx2160a system where serdes #1 PLLS (161MHz) and PLLF
(100MHz) were mistakenly swapped.
After reset the PLL's did lock (to wrong rates) but the serdes locked up
and never cleared either lane-specific or global halt- and reset-bits.

Signed-off-by: Josua Mayer <josua@solid-run.com>
---
 drivers/phy/freescale/phy-fsl-lynx-28g.c | 42 ++++++++++++++++++++++++--------
 1 file changed, 32 insertions(+), 10 deletions(-)


---
base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
change-id: 20240218-lynx28g-infinite-loop-5f090b4237c7

Best regards,

Comments

Josua Mayer Feb. 18, 2024, 2:21 p.m. UTC | #1 
Am 18.02.24 um 15:09 schrieb Josua Mayer:

> Power-on and -off functions set and wait for self-clearing reset-
> and halt-bits in serdes registers.
> In certain operating conditions these bits may not actually clear.
>
> Replace the infinite while-loops with read_poll_timeout to ensure that
> power_on and power_off will always return even when the bits did not
> clear within a full second.
>
> On timeout print an error message and return error code.
> In this situation the serdes lane has an invalid state,
> without no known recovery procedure.
>
> This fixes an infinite loop / hang during boot observed on a
> misconfigured lx2160a system where serdes #1 PLLS (161MHz) and PLLF
> (100MHz) were mistakenly swapped.
> After reset the PLL's did lock (to wrong rates) but the serdes locked up
> and never cleared either lane-specific or global halt- and reset-bits.
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
> ---
>   drivers/phy/freescale/phy-fsl-lynx-28g.c | 42 ++++++++++++++++++++++++--------
>   1 file changed, 32 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/phy/freescale/phy-fsl-lynx-28g.c b/drivers/phy/freescale/phy-fsl-lynx-28g.c
> index e2187767ce00..5ae5b47619f8 100644
> --- a/drivers/phy/freescale/phy-fsl-lynx-28g.c
> +++ b/drivers/phy/freescale/phy-fsl-lynx-28g.c
> @@ -335,6 +335,7 @@ static int lynx_28g_power_off(struct phy *phy)
> ...
> +	err = read_poll_timeout(lynx_28g_lane_read, rrstctl,
> +				!(rrstctl & LYNX_28G_LNaRRSTCTL_HLT_REQ),
> +				10000, 1000000, false, lane, LNaRRSTCTL);
> +	if (err) {
> +		dev_err(&phy->dev, "tx lane halt failed: %d\n", err);
Message should be "rx" lane, will fix in v2.
diff mbox series

Patch

diff --git a/drivers/phy/freescale/phy-fsl-lynx-28g.c b/drivers/phy/freescale/phy-fsl-lynx-28g.c
index e2187767ce00..5ae5b47619f8 100644
--- a/drivers/phy/freescale/phy-fsl-lynx-28g.c
+++ b/drivers/phy/freescale/phy-fsl-lynx-28g.c
@@ -335,6 +335,7 @@  static int lynx_28g_power_off(struct phy *phy)
 {
 	struct lynx_28g_lane *lane = phy_get_drvdata(phy);
 	u32 trstctl, rrstctl;
+	int err;
 
 	if (!lane->powered_up)
 		return 0;
@@ -344,11 +345,21 @@  static int lynx_28g_power_off(struct phy *phy)
 	lynx_28g_lane_rmw(lane, LNaRRSTCTL, HLT_REQ, HLT_REQ);
 
 	/* Wait until the halting process is complete */
-	do {
-		trstctl = lynx_28g_lane_read(lane, LNaTRSTCTL);
-		rrstctl = lynx_28g_lane_read(lane, LNaRRSTCTL);
-	} while ((trstctl & LYNX_28G_LNaTRSTCTL_HLT_REQ) ||
-		 (rrstctl & LYNX_28G_LNaRRSTCTL_HLT_REQ));
+	err = read_poll_timeout(lynx_28g_lane_read, trstctl,
+				!(trstctl & LYNX_28G_LNaTRSTCTL_HLT_REQ),
+				10000, 1000000, false, lane, LNaTRSTCTL);
+	if (err) {
+		dev_err(&phy->dev, "tx lane halt failed: %d\n", err);
+		return err;
+	}
+
+	err = read_poll_timeout(lynx_28g_lane_read, rrstctl,
+				!(rrstctl & LYNX_28G_LNaRRSTCTL_HLT_REQ),
+				10000, 1000000, false, lane, LNaRRSTCTL);
+	if (err) {
+		dev_err(&phy->dev, "tx lane halt failed: %d\n", err);
+		return err;
+	}
 
 	lane->powered_up = false;
 
@@ -359,6 +370,7 @@  static int lynx_28g_power_on(struct phy *phy)
 {
 	struct lynx_28g_lane *lane = phy_get_drvdata(phy);
 	u32 trstctl, rrstctl;
+	int err;
 
 	if (lane->powered_up)
 		return 0;
@@ -368,11 +380,21 @@  static int lynx_28g_power_on(struct phy *phy)
 	lynx_28g_lane_rmw(lane, LNaRRSTCTL, RST_REQ, RST_REQ);
 
 	/* Wait until the reset sequence is completed */
-	do {
-		trstctl = lynx_28g_lane_read(lane, LNaTRSTCTL);
-		rrstctl = lynx_28g_lane_read(lane, LNaRRSTCTL);
-	} while (!(trstctl & LYNX_28G_LNaTRSTCTL_RST_DONE) ||
-		 !(rrstctl & LYNX_28G_LNaRRSTCTL_RST_DONE));
+	err = read_poll_timeout(lynx_28g_lane_read, trstctl,
+				trstctl & LYNX_28G_LNaTRSTCTL_RST_DONE,
+				10000, 1000000, false, lane, LNaTRSTCTL);
+	if (err) {
+		dev_err(&phy->dev, "lane tx reset failed: %d\n", err);
+		return err;
+	}
+
+	err = read_poll_timeout(lynx_28g_lane_read, rrstctl,
+				rrstctl & LYNX_28G_LNaRRSTCTL_RST_DONE,
+				10000, 1000000, false, lane, LNaRRSTCTL);
+	if (err) {
+		dev_err(&phy->dev, "lane rx reset failed: %d\n", err);
+		return err;
+	}
 
 	lane->powered_up = true;