| Message ID | 20240219144015.355462-1-elder@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | d80f8e96d47d7374794a30fbed69be43f3388afc |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net,v2] net: ipa: don't overrun IPA suspend interrupt registers | expand |
Hello: This patch was applied to netdev/net.git (main) by David S. Miller <davem@davemloft.net>: On Mon, 19 Feb 2024 08:40:15 -0600 you wrote: > In newer hardware, IPA supports more than 32 endpoints. Some > registers--such as IPA interrupt registers--represent endpoints > as bits in a 4-byte register, and such registers are repeated as > needed to represent endpoints beyond the first 32. > > In ipa_interrupt_suspend_clear_all(), we clear all pending IPA > suspend interrupts by reading all status register(s) and writing > corresponding registers to clear interrupt conditions. > > [...] Here is the summary with links: - [net,v2] net: ipa: don't overrun IPA suspend interrupt registers https://git.kernel.org/netdev/net/c/d80f8e96d47d You are awesome, thank you!
diff --git a/drivers/net/ipa/ipa_interrupt.c b/drivers/net/ipa/ipa_interrupt.c index 4bc05948f772d..a78c692f2d3c5 100644 --- a/drivers/net/ipa/ipa_interrupt.c +++ b/drivers/net/ipa/ipa_interrupt.c @@ -212,7 +212,7 @@ void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt) u32 unit_count; u32 unit; - unit_count = roundup(ipa->endpoint_count, 32); + unit_count = DIV_ROUND_UP(ipa->endpoint_count, 32); for (unit = 0; unit < unit_count; unit++) { const struct reg *reg; u32 val;
In newer hardware, IPA supports more than 32 endpoints. Some registers--such as IPA interrupt registers--represent endpoints as bits in a 4-byte register, and such registers are repeated as needed to represent endpoints beyond the first 32. In ipa_interrupt_suspend_clear_all(), we clear all pending IPA suspend interrupts by reading all status register(s) and writing corresponding registers to clear interrupt conditions. Unfortunately the number of registers to read/write is calculated incorrectly, and as a result we access *many* more registers than intended. This bug occurs only when the IPA hardware signals a SUSPEND interrupt, which happens when a packet is received for an endpoint (or its underlying GSI channel) that is suspended. This situation is difficult to reproduce, but possible. Fix this by correctly computing the number of interrupt registers to read and write. This is the only place in the code where registers that map endpoints or channels this way perform this calculation. Fixes: f298ba785e2d ("net: ipa: add a parameter to suspend registers") Signed-off-by: Alex Elder <elder@linaro.org> --- v2: Added "net" tag to the subject and rebased. drivers/net/ipa/ipa_interrupt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)