From patchwork Tue Feb 20 23:57:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinicius Costa Gomes X-Patchwork-Id: 13564771 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C2C31552E0; Tue, 20 Feb 2024 23:57:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708473445; cv=none; b=QaakS5cZ7qYu8U0lWgAlHk6aPW2DFg5TOZQYsMU44WV/PKmdXh5m+2Y8/aVGyayXYSKavPZJpogJldn3Vo5KuOQbw/VK1+8yH35hXMhXv0Dszd8z60K5PshLccvhkx3WU4FXdnA1Uk1Mc9t+2SCdcjJIHNR8jeDpuZHxib8gfzk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708473445; c=relaxed/simple; bh=j7Zixg1QER2i+fNcEEtAoe4JXGnkdFEd25ICHCfBynA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=o2pY9b9UypTAIybrPcetT0DqEL1eetj7eQyhZSguPRdgKo/tC3J4U2r3AUgerT3hE5AzZhskicZybvkqn7FWsd1Qvc2CqHuYDdbM6JwnW1Zc4CoeRUhig9VQltJro1V0wlGYGYY334dKiTfRWa13KZRVjXCICTMUcllvgT2df9E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=bdL7ETPT; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="bdL7ETPT" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1708473444; x=1740009444; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=j7Zixg1QER2i+fNcEEtAoe4JXGnkdFEd25ICHCfBynA=; b=bdL7ETPTBbI36X/aZsFP+S4wbUQojbg9fRAubwfXYhW7fpQaRJJSzRaS XzcYLC117jzuRawkkaU1sRJ8KI6IqmW69nXVhrcusX4e1a/E/pes6m1ho MiD2arPzbEWUeIA3KV0czcMYj5sZwjXcDO1YWMub0gMpytm2LqrbCYrlX cc06ce49hc4qlxr8rOvb+qhFG5UCryA0eNE79ZyY3qJVkBvQBtMmR4syg jnLVMAZU+feS5NCaY+nMN3K6x7XaUip2OEU9JYBHnZxuiv+QVDaCLgruf TnJwJW7dfUWUqRwTbphybnGmD4Xrl8LELeQPInGXelFSg0RwEy0S+XkB/ w==; X-IronPort-AV: E=McAfee;i="6600,9927,10990"; a="20041771" X-IronPort-AV: E=Sophos;i="6.06,174,1705392000"; d="scan'208";a="20041771" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Feb 2024 15:57:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,174,1705392000"; d="scan'208";a="5092390" Received: from vcostago-mobl3.jf.intel.com ([10.24.14.83]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Feb 2024 15:57:20 -0800 From: Vinicius Costa Gomes To: intel-wired-lan@lists.osuosl.org Cc: sasha.neftin@intel.com, richardcochran@gmail.com, kurt@linutronix.de, anthony.l.nguyen@intel.com, jesse.brandeburg@intel.com, netdev@vger.kernel.org, Vinicius Costa Gomes , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jeff Kirsher , linux-kernel@vger.kernel.org Subject: [iwl-net v2 2/2] igb: Fix missing time sync events Date: Tue, 20 Feb 2024 15:57:11 -0800 Message-ID: <20240220235712.241552-3-vinicius.gomes@intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240220235712.241552-1-vinicius.gomes@intel.com> References: <20240220235712.241552-1-vinicius.gomes@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Fix "double" clearing of interrupts, which can cause external events or timestamps to be missed. The E1000_TSIRC Time Sync Interrupt Cause register can be cleared in two ways, by either reading it or by writing '1' into the specific cause bit. This is documented in section 8.16.1. The following flow was used: 1. read E1000_TSIRC into 'tsicr'; 2. handle the interrupts present into 'tsirc' and mark them in 'ack'; 3. write 'ack' into E1000_TSICR; As both (1) and (3) will clear the interrupt cause, if the same interrupt happens again between (1) and (3) it will be ignored, causing events to be missed. Remove the extra clear in (3). Fixes: 00c65578b47b ("igb: enable internal PPS for the i210") Acked-by: Richard Cochran Signed-off-by: Vinicius Costa Gomes Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) --- drivers/net/ethernet/intel/igb/igb_main.c | 23 +++++------------------ 1 file changed, 5 insertions(+), 18 deletions(-) diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c index cebb44f51d5f..7662c42e35c1 100644 --- a/drivers/net/ethernet/intel/igb/igb_main.c +++ b/drivers/net/ethernet/intel/igb/igb_main.c @@ -6985,44 +6985,31 @@ static void igb_extts(struct igb_adapter *adapter, int tsintr_tt) static void igb_tsync_interrupt(struct igb_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; - u32 ack = 0, tsicr = rd32(E1000_TSICR); + u32 tsicr = rd32(E1000_TSICR); struct ptp_clock_event event; if (tsicr & TSINTR_SYS_WRAP) { event.type = PTP_CLOCK_PPS; if (adapter->ptp_caps.pps) ptp_clock_event(adapter->ptp_clock, &event); - ack |= TSINTR_SYS_WRAP; } if (tsicr & E1000_TSICR_TXTS) { /* retrieve hardware timestamp */ schedule_work(&adapter->ptp_tx_work); - ack |= E1000_TSICR_TXTS; } - if (tsicr & TSINTR_TT0) { + if (tsicr & TSINTR_TT0) igb_perout(adapter, 0); - ack |= TSINTR_TT0; - } - if (tsicr & TSINTR_TT1) { + if (tsicr & TSINTR_TT1) igb_perout(adapter, 1); - ack |= TSINTR_TT1; - } - if (tsicr & TSINTR_AUTT0) { + if (tsicr & TSINTR_AUTT0) igb_extts(adapter, 0); - ack |= TSINTR_AUTT0; - } - if (tsicr & TSINTR_AUTT1) { + if (tsicr & TSINTR_AUTT1) igb_extts(adapter, 1); - ack |= TSINTR_AUTT1; - } - - /* acknowledge the interrupts */ - wr32(E1000_TSICR, ack); } static irqreturn_t igb_msix_other(int irq, void *data)