| Message ID | 20240326065805.686128-1-Raju.Lakkaraju@microchip.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | e4a58989f5c839316ac63675e8800b9eed7dbe96 |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net,V2] net: lan743x: Add set RFE read fifo threshold for PCI1x1x chips | expand |
On Tue, Mar 26, 2024 at 12:28:05PM +0530, Raju Lakkaraju wrote: > PCI11x1x Rev B0 devices might drop packets when receiving back to back frames > at 2.5G link speed. Change the B0 Rev device's Receive filtering Engine FIFO > threshold parameter from its hardware default of 4 to 3 dwords to prevent the > problem. Rev C0 and later hardware already defaults to 3 dwords. > > Fixes: bb4f6bffe33c ("net: lan743x: Add PCI11010 / PCI11414 device IDs") > Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com> Reviewed-by: Simon Horman <horms@kernel.org>
Hello: This patch was applied to netdev/net.git (main) by Paolo Abeni <pabeni@redhat.com>: On Tue, 26 Mar 2024 12:28:05 +0530 you wrote: > PCI11x1x Rev B0 devices might drop packets when receiving back to back frames > at 2.5G link speed. Change the B0 Rev device's Receive filtering Engine FIFO > threshold parameter from its hardware default of 4 to 3 dwords to prevent the > problem. Rev C0 and later hardware already defaults to 3 dwords. > > Fixes: bb4f6bffe33c ("net: lan743x: Add PCI11010 / PCI11414 device IDs") > Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com> > > [...] Here is the summary with links: - [net,V2] net: lan743x: Add set RFE read fifo threshold for PCI1x1x chips https://git.kernel.org/netdev/net/c/e4a58989f5c8 You are awesome, thank you!
diff --git a/drivers/net/ethernet/microchip/lan743x_main.c b/drivers/net/ethernet/microchip/lan743x_main.c index bd8aa83b47e5..75a988c0bd79 100644 --- a/drivers/net/ethernet/microchip/lan743x_main.c +++ b/drivers/net/ethernet/microchip/lan743x_main.c @@ -25,6 +25,8 @@ #define PCS_POWER_STATE_DOWN 0x6 #define PCS_POWER_STATE_UP 0x4 +#define RFE_RD_FIFO_TH_3_DWORDS 0x3 + static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter) { u32 chip_rev; @@ -3272,6 +3274,21 @@ static void lan743x_full_cleanup(struct lan743x_adapter *adapter) lan743x_pci_cleanup(adapter); } +static void pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter *adapter) +{ + u16 rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_; + + if (rev == ID_REV_CHIP_REV_PCI11X1X_B0_) { + u32 misc_ctl; + + misc_ctl = lan743x_csr_read(adapter, MISC_CTL_0); + misc_ctl &= ~MISC_CTL_0_RFE_READ_FIFO_MASK_; + misc_ctl |= FIELD_PREP(MISC_CTL_0_RFE_READ_FIFO_MASK_, + RFE_RD_FIFO_TH_3_DWORDS); + lan743x_csr_write(adapter, MISC_CTL_0, misc_ctl); + } +} + static int lan743x_hardware_init(struct lan743x_adapter *adapter, struct pci_dev *pdev) { @@ -3287,6 +3304,7 @@ static int lan743x_hardware_init(struct lan743x_adapter *adapter, pci11x1x_strap_get_status(adapter); spin_lock_init(&adapter->eth_syslock_spinlock); mutex_init(&adapter->sgmii_rw_lock); + pci11x1x_set_rfe_rd_fifo_threshold(adapter); } else { adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS; adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS; diff --git a/drivers/net/ethernet/microchip/lan743x_main.h b/drivers/net/ethernet/microchip/lan743x_main.h index be79cb0ae5af..645bc048e52e 100644 --- a/drivers/net/ethernet/microchip/lan743x_main.h +++ b/drivers/net/ethernet/microchip/lan743x_main.h @@ -26,6 +26,7 @@ #define ID_REV_CHIP_REV_MASK_ (0x0000FFFF) #define ID_REV_CHIP_REV_A0_ (0x00000000) #define ID_REV_CHIP_REV_B0_ (0x00000010) +#define ID_REV_CHIP_REV_PCI11X1X_B0_ (0x000000B0) #define FPGA_REV (0x04) #define FPGA_REV_GET_MINOR_(fpga_rev) (((fpga_rev) >> 8) & 0x000000FF) @@ -311,6 +312,9 @@ #define SGMII_CTL_LINK_STATUS_SOURCE_ BIT(8) #define SGMII_CTL_SGMII_POWER_DN_ BIT(1) +#define MISC_CTL_0 (0x920) +#define MISC_CTL_0_RFE_READ_FIFO_MASK_ GENMASK(6, 4) + /* Vendor Specific SGMII MMD details */ #define SR_VSMMD_PCS_ID1 0x0004 #define SR_VSMMD_PCS_ID2 0x0005
PCI11x1x Rev B0 devices might drop packets when receiving back to back frames at 2.5G link speed. Change the B0 Rev device's Receive filtering Engine FIFO threshold parameter from its hardware default of 4 to 3 dwords to prevent the problem. Rev C0 and later hardware already defaults to 3 dwords. Fixes: bb4f6bffe33c ("net: lan743x: Add PCI11010 / PCI11414 device IDs") Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com> --- Change List: ------------ V1 -> V2: - change the function return type from int to void V0 -> V1: - misc_ctl change from int to unsigned int - Use FIELD_PREP macro instead of logical shift operator - Change 0x3 to macro RFE_RD_FIFO_TH_3_DWORDS drivers/net/ethernet/microchip/lan743x_main.c | 20 +++++++++++++++++++ drivers/net/ethernet/microchip/lan743x_main.h | 4 ++++ 2 files changed, 22 insertions(+)