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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Jianbo Liu , Parav Pandit , Moshe Shemesh , Tariq Toukan Subject: [PATCH net-next V2 11/11] net/mlx5: Don't call give_pages() if request 0 page Date: Tue, 2 Apr 2024 16:30:43 +0300 Message-ID: <20240402133043.56322-12-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240402133043.56322-1-tariqt@nvidia.com> References: <20240402133043.56322-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EDD1:EE_|BL3PR12MB6450:EE_ X-MS-Office365-Filtering-Correlation-Id: 6cd36111-4b33-4195-8c2f-08dc53195ced X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: XT9tTl6MMgwrhUsvSNm5moGfPoEw8/5SGTP1etyLC3HCrV0P5qGNaNtyDOTyPcLl2SMPEYB6+rzX+DN171b1QyigshepyMY0qJhQKbp2Sm1tFo7NKH1HJloy/yhl+9Z57xLU4kGGnxb3FxkiprTD261TxpUd8eaMIbaZIPkBrp1ku/YBJTeH+c5N68p7/5qkaVUoRzXexbSjtsqnIuDVwvzP0xyEDabrcAc4MwLfWmbgQt/IC4DEWYjxz+KavBoQy7fz/3yaKqK1bGLUMhUkpP7xt0MKixSD1qtfbeEO5FXOj2q2eZa1Ga1gchocMbwREnoLj9VGqyKi6KlTOHxtYeaaU5G824QJgSrm56skm6BkfbrTMknBVe+mbOIajISgKxigkS9WxqLoPL0DNxEM3scv9nXIXHkKdfNPP9CnRHBsYKqBmC8AJGuCqvhgMjkCKPQ8lS0ogZP7wnnQS05mYltshtB62CuwqtapgpDnc7eGwyq+RxHM+io6G7xSMBWgvLZ2Rw4xbzeQSF/tAYTB7S+KWBKgl5PybKhQe1/Zod/nPT/o8NshO/zC6tM/4vgz6VCmcBXkt4pttKNNI2BBmZiYJbI1ZEs7AmPrD/wu+EA649OdYqeen6rnkjPvMUWlgVZQ9o6WfezQsAxJ/jPBhmLFNHbDj7pWCq7Epy+3JBpbMWKDuDmeR7b1R3oGibkCU1Q15O+uW+PewwR4VogJvCRMpJGfVw7xlPy3GZhIoPpXIu2GuOvSnydJg+qTDwgB X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(36860700004)(376005)(82310400014)(1800799015);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2024 13:32:37.6721 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6cd36111-4b33-4195-8c2f-08dc53195ced X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EDD1.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6450 X-Patchwork-Delegate: kuba@kernel.org From: Jianbo Liu Firmware will return 0 on query BOOT/INIT PAGES for non-page supplier functions (external host PF/VF/SF), so no page is needed to be allocated for them. Signed-off-by: Jianbo Liu Reviewed-by: Parav Pandit Reviewed-by: Moshe Shemesh Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c b/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c index dcf58efac159..d894a88fa9f2 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c @@ -660,6 +660,9 @@ int mlx5_satisfy_startup_pages(struct mlx5_core_dev *dev, int boot) mlx5_core_dbg(dev, "requested %d %s pages for func_id 0x%x\n", npages, boot ? "boot" : "init", func_id); + if (!npages) + return 0; + return give_pages(dev, func_id, npages, 0, mlx5_core_is_ecpf(dev)); }