From patchwork Thu Apr 11 14:36:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Roullier X-Patchwork-Id: 13626066 X-Patchwork-Delegate: kuba@kernel.org Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B04B14A89; Thu, 11 Apr 2024 14:39:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712846343; cv=none; b=S0ze8AbBeduzzS0eUsOvTQ5qGLLTnshOunHf62mdjc2kuCea9nQc1ayHhBcsMWgPjgWIWISb8ir6IxWad1Fd4HqOTa4MwHudzvo+v/Ewyb29xv5I3pmC4P/1Uxr6o7ilPjFg01dlaOuB8nKO6HwU4006HndCNdWgokYDhXeuzCI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712846343; c=relaxed/simple; bh=YL1RUWlv3P1EBXMUpoCbPMd0AllNidwnlO6dtsgVGe4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Wympt466Sn0/+I4jyNcksvLXBpAbP34SkVU/xnS50+vzykWZzYQZ4STxTnYyQPA2lV3A8JdvirPZzglApzoEQs13sdIUbEyIYTAnkNFaKTapSrD27q21+7h040a+99qGeA5gQjc4c5eidip3u2ersW+rHTnH3tB/YJaUGSyhT+c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=ifoSUDyE; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="ifoSUDyE" Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 43B9B0cf010268; Thu, 11 Apr 2024 16:38:37 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=l4bgO4YeCgG4Hc7Gdk7296adP9SZ8GSFiE9p+457b+I=; b=if oSUDyExv6UrkhWPqLL9PozPe4qNNavZ6Mnl2RXpIRDgdFLO5wEb1Frtn/nkcfP9P x/FB50lZoNlYlkb7bZvmTUaf+AewPOjNpgdkue3h8ZgQkEfmw/JySKVARUzbHaQG QDz5RGDvmXzOi0CTwNHViSCwTNUYTyT7NbzkO9hUGTZAwMk78Egf7U1wPls/VxPD XEQ9JTI5IlGuZ3yB2kg6NCu9dOsSE0yKU7p0Nk6eJf7EHXK+SoboOxSLKFD3RUZM 4stMnbDLw0e9GV59v7f1XEe7qZuk2NEDfIqbgYFxXZ+0rsPQyUyYQuv2i9K0CMm8 EX5GeQXW2JgWzFtDDJ7Q== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3xawqy5ds8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 11 Apr 2024 16:38:37 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 5278340047; Thu, 11 Apr 2024 16:38:34 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id E77B821BF55; Thu, 11 Apr 2024 16:37:24 +0200 (CEST) Received: from localhost (10.48.86.106) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 11 Apr 2024 16:37:24 +0200 From: Christophe Roullier To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Richard Cochran , Jose Abreu , Liam Girdwood , Mark Brown , Christophe Roullier CC: , , , , Subject: [PATCH 04/11] net: ethernet: stmmac: add management of stm32mp13 for stm32 Date: Thu, 11 Apr 2024 16:36:51 +0200 Message-ID: <20240411143658.1049706-5-christophe.roullier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240411143658.1049706-1-christophe.roullier@foss.st.com> References: <20240411143658.1049706-1-christophe.roullier@foss.st.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-11_08,2024-04-09_01,2023-05-22_02 X-Patchwork-Delegate: kuba@kernel.org Add Ethernet support for STM32MP13. STM32MP13 is STM32 SOC with 2 GMACs instances. GMAC IP version is SNPS 4.20. GMAC IP configure with 1 RX and 1 TX queue. DMA HW capability register supported RX Checksum Offload Engine supported TX Checksum insertion supported Wake-Up On Lan supported TSO supported Signed-off-by: Christophe Roullier --- .../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c index 68a02de25ac76..7529a8d154920 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c @@ -517,9 +517,30 @@ static struct stm32_ops stm32mp1_dwmac_data = { } }; +static struct stm32_ops stm32mp13_dwmac_data = { + .set_mode = stm32mp1_set_mode, + .suspend = stm32mp1_suspend, + .resume = stm32mp1_resume, + .parse_data = stm32mp1_parse_data, + .clk_rx_enable_in_suspend = true, + .syscfg_clr_off = 0x08, + .pmcsetr = { + .eth1_clk_sel = BIT(16), + .eth1_ref_clk_sel = BIT(17), + .eth1_selmii = 0, + .eth1_sel_rgmii = BIT(21), + .eth1_sel_rmii = BIT(23), + .eth2_clk_sel = BIT(24), + .eth2_ref_clk_sel = BIT(25), + .eth2_sel_rgmii = BIT(29), + .eth2_sel_rmii = BIT(31) + } +}; + static const struct of_device_id stm32_dwmac_match[] = { { .compatible = "st,stm32-dwmac", .data = &stm32mcu_dwmac_data}, { .compatible = "st,stm32mp1-dwmac", .data = &stm32mp1_dwmac_data}, + { .compatible = "st,stm32mp13-dwmac", .data = &stm32mp13_dwmac_data}, { } }; MODULE_DEVICE_TABLE(of, stm32_dwmac_match);