@@ -52,6 +52,24 @@ properties:
description: Enable 25MHz reference clock output on CLK25_REF pin.
type: boolean
+ adi,led-polarity:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ LED_0 pin polarity. If unspecified keep phy reset-default derived
+ from hardware configuration pins.
+ enum:
+ - 0 # active high
+ - 1 # active low
+
+ adi,link-st-polarity:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ LINK_ST pin polarity.
+ enum:
+ - 0 # active high
+ - 1 # active low
+ default: 0
+
unevaluatedProperties: false
examples:
ADIN1300 supports software control over pin polarity for both LED_0 and LINK_ST pins. Add new properties to set pin polarity: - adi,led-polarity: LED_0 is used as hardware configuration signal during reset. Depending on external voltage on the line default value is either active-high (0) or active-low (1). - adi,link-st-polarity: LINK_ST is always active-high (0) after reset. Signed-off-by: Josua Mayer <josua@solid-run.com> --- Documentation/devicetree/bindings/net/adi,adin.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)