From patchwork Tue May 28 23:03:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 13677534 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEEC313F006 for ; Tue, 28 May 2024 23:04:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716937455; cv=none; b=YQWvttSi51Svra/CiXErfmTLZwh94Eq+VWvUDVvkppFz7DV80f+4MpZ4HWlt8h5VeTIo4mHl+rlNW0bSks9lVflyJrEIuI85njtC2EG9vzvIaH2qGDP1wLnJNkkOsbfajcc/lEV3Ff3Bfxc6q9jq6hPPY5NYS576Qw9bJlJP8+g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716937455; c=relaxed/simple; bh=jWZj+eN2FWTIR6uSLD0TyZVqaQei6jSEp9nhq15ZI+Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tjDBH/xxXUFKJutTSYxl+ypRPkEliojGgb+Wd+i5goDxfN51zoev6dNs0ljm5Kw+70t+KaM3yXB6RkfoD8aa2oxN94nhN0NoiM3r2ITKtPFbRi7WFbi3xtvDmak87vG+5ZYtAP5dsBhuoFAT0P9Eem03tA6JYHSJnSwQpus831s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=NW9Odtdm; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="NW9Odtdm" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716937454; x=1748473454; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=jWZj+eN2FWTIR6uSLD0TyZVqaQei6jSEp9nhq15ZI+Y=; b=NW9OdtdmZcvuQmU0SmmAIv/eglZJghvSU8+wFtagObEfJgjIyFrGlcPJ ntD9mZ27eKuhKQ6c6E559mDD6EVtxcSBBe8044O8wkPvN+fntaufm0GwI 5cwN3HeDAZjXcixrrkZVncCP4zkUEEuC2wRyTZ1/ZP9fBcBn5IETQ1pI4 hBFvDagpPschACCFVwD3cOHL/evAwGNvQ9MuBIPhP6h5WxmLExSSUVKbm xEqtT3An4c6tZMKGdiWK4Q1huBlNGS3U+MiUvZ6V7Hpb+f9W1GCddoqCA QhQu6KxbiYmQ7f86zI0bPovSx1z/UbfMH1DIh3947pm1+UhyMG2BObXll w==; X-CSE-ConnectionGUID: IWFSshfeQryGy38n5sr49w== X-CSE-MsgGUID: BmZn8EpDR2S6yCrmZ54oMA== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="13444883" X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="13444883" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 16:04:12 -0700 X-CSE-ConnectionGUID: TJMZ7ac/SEGc0D+t7X2daQ== X-CSE-MsgGUID: Bvn1MFFYTNmm+xuTbbXWdw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,196,1712646000"; d="scan'208";a="39672295" Received: from jekeller-desk.amr.corp.intel.com ([10.166.241.1]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 16:04:11 -0700 From: Jacob Keller Date: Tue, 28 May 2024 16:03:56 -0700 Subject: [PATCH next 06/11] ice: Introduce ice_get_base_incval() helper Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240528-next-2024-05-28-ptp-refactors-v1-6-c082739bb6f6@intel.com> References: <20240528-next-2024-05-28-ptp-refactors-v1-0-c082739bb6f6@intel.com> In-Reply-To: <20240528-next-2024-05-28-ptp-refactors-v1-0-c082739bb6f6@intel.com> To: David Miller , Jakub Kicinski , netdev Cc: Jacob Keller , Jiri Pirko , Przemek Kitszel , Arkadiusz Kubalewski , Karol Kolacinski , Pucha Himasekhar Reddy X-Mailer: b4 0.13.0 X-Patchwork-Delegate: kuba@kernel.org Add a new helper for getting base clock increment value for specific HW. Reviewed-by: Przemek Kitszel Reviewed-by: Arkadiusz Kubalewski Signed-off-by: Karol Kolacinski Tested-by: Pucha Himasekhar Reddy Signed-off-by: Jacob Keller --- drivers/net/ethernet/intel/ice/ice_ptp.c | 9 +-------- drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index 4ed2213247f7..923011c9609a 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -7,8 +7,6 @@ #define E810_OUT_PROP_DELAY_NS 1 -#define UNKNOWN_INCVAL_E82X 0x100000000ULL - static const struct ptp_pin_desc ice_pin_desc_e810t[] = { /* name idx func chan */ { "GNSS", GNSS, PTP_PF_EXTTS, 0, { 0, } }, @@ -1210,12 +1208,7 @@ static u64 ice_base_incval(struct ice_pf *pf) struct ice_hw *hw = &pf->hw; u64 incval; - if (ice_is_e810(hw)) - incval = ICE_PTP_NOMINAL_INCVAL_E810; - else if (ice_e82x_time_ref(hw) < NUM_ICE_TIME_REF_FREQ) - incval = ice_e82x_nominal_incval(ice_e82x_time_ref(hw)); - else - incval = UNKNOWN_INCVAL_E82X; + incval = ice_get_base_incval(hw); dev_dbg(ice_pf_to_dev(pf), "PTP: using base increment value of 0x%016llx\n", incval); diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h index 2d8ba9c2251d..3fe12a1694fc 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h @@ -285,6 +285,24 @@ int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, unsigned long *caps); +/** + * ice_get_base_incval - Get base clock increment value + * @hw: pointer to the HW struct + * + * Return: base clock increment value for supported PHYs, 0 otherwise + */ +static inline u64 ice_get_base_incval(struct ice_hw *hw) +{ + switch (hw->ptp.phy_model) { + case ICE_PHY_E810: + return ICE_PTP_NOMINAL_INCVAL_E810; + case ICE_PHY_E82X: + return ice_e82x_nominal_incval(ice_e82x_time_ref(hw)); + default: + return 0; + } +} + #define PFTSYN_SEM_BYTES 4 #define ICE_PTP_CLOCK_INDEX_0 0x00