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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF0001AB4E.mail.protection.outlook.com (10.167.242.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7633.15 via Frontend Transport; Fri, 31 May 2024 21:41:13 +0000 Received: from weiserver.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 31 May 2024 16:41:12 -0500 From: Wei Huang To: , , , CC: , , , , , , , , , , , , , , , , , Subject: [PATCH V2 9/9] bnxt_en: Pass NQ ID to the FW when allocating RX/RX AGG rings Date: Fri, 31 May 2024 16:38:41 -0500 Message-ID: <20240531213841.3246055-10-wei.huang2@amd.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240531213841.3246055-1-wei.huang2@amd.com> References: <20240531213841.3246055-1-wei.huang2@amd.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB4E:EE_|PH8PR12MB6988:EE_ X-MS-Office365-Filtering-Correlation-Id: 8510eab1-3843-4900-ec3b-08dc81ba64b5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|36860700004|7416005|1800799015|82310400017|376005; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 May 2024 21:41:13.2843 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8510eab1-3843-4900-ec3b-08dc81ba64b5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB4E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6988 X-Patchwork-Delegate: kuba@kernel.org From: Michael Chan Newer firmware can use the NQ ring ID associated with each RX/RX AGG ring to enable PCIe steering tag. Older firmware will just ignore the information. Signed-off-by: Michael Chan Signed-off-by: Andy Gospodarek Reviewed-by: Hongguang Gao Reviewed-by: Ajit Khaparde --- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c index 2207dac8ce18..308b4747d041 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c @@ -6699,10 +6699,12 @@ static int hwrm_ring_alloc_send_msg(struct bnxt *bp, /* Association of rx ring with stats context */ grp_info = &bp->grp_info[ring->grp_idx]; + req->nq_ring_id = cpu_to_le16(grp_info->cp_fw_ring_id); req->rx_buf_size = cpu_to_le16(bp->rx_buf_use_size); req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx); req->enables |= cpu_to_le32( - RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID); + RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID | + RING_ALLOC_REQ_ENABLES_NQ_RING_ID_VALID); if (NET_IP_ALIGN == 2) flags = RING_ALLOC_REQ_FLAGS_RX_SOP_PAD; req->flags = cpu_to_le16(flags); @@ -6714,11 +6716,13 @@ static int hwrm_ring_alloc_send_msg(struct bnxt *bp, /* Association of agg ring with rx ring */ grp_info = &bp->grp_info[ring->grp_idx]; req->rx_ring_id = cpu_to_le16(grp_info->rx_fw_ring_id); + req->nq_ring_id = cpu_to_le16(grp_info->cp_fw_ring_id); req->rx_buf_size = cpu_to_le16(BNXT_RX_PAGE_SIZE); req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx); req->enables |= cpu_to_le32( RING_ALLOC_REQ_ENABLES_RX_RING_ID_VALID | - RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID); + RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID | + RING_ALLOC_REQ_ENABLES_NQ_RING_ID_VALID); } else { req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX; }