From patchwork Mon Jun 3 09:27:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Roullier X-Patchwork-Id: 13683423 X-Patchwork-Delegate: kuba@kernel.org Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D39D984D3A; Mon, 3 Jun 2024 09:30:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717407007; cv=none; b=nualIHlQCv5emd2dGsIU8J0AOdYQU2CZSqkyS3CpZPZ9oUdbEKMRNpoHMluzNafATDX5JhzKNLpifhdXYPXOrD3SjT/UffWFI7X3rgEAUYiTKF94jtPEv6d3ySMhhzvr3b7WYbmtYqsG9JdENOYUqwJekaA/sqjFQXNBDhjil8s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717407007; c=relaxed/simple; bh=7DtE2k2URWPLOQxFQ6I32AXng4aK2uTQua12hUWR4aE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=LyuiGI3y+Xo2ZfRBUoIJ8LOCsVLrtRskox1j/s3pa/6AIvcGfoL/+Yndzh/mk/wPQboIirU95w58tOKYRR2yRTMaaglDQi4ZuA7cVxLMn76rKMytdDFshztHpW3LjkzgmO6qbAgjLCDevGCbkcDZJ0xPk9acUje+in22odLfhhY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=LdawYK84; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="LdawYK84" Received: from pps.filterd (m0369458.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4537qTC2019652; Mon, 3 Jun 2024 11:29:35 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= +WD+VBlXoFQll6mJcA7zh1UIJj1M9uQ2/WUqbV1b2r0=; b=LdawYK84eemb8ohd EnIJjSiXjELBTeHyI73xB/irO+O4cOXQIQoKGO6FwhmY0e7ZMPoes/wOY6iVsdSX 3amTGiC1t6h0crmiAD5fCAfJyd8CQbbxohOXfzF8tPv39fS4JTd10xNWAIPScSL3 Ng3pwxgDf4+MBrEvtiitrcMfREUKWkdgnSxU6pvcJNQRwVzlB3tdMbv7tH0Ov3K+ bJSm/mayI2ay/fPTn+2HsPtZwyto/vQYZkaI+t6GUudV7yOFgXnPRr1cXvZ6p0Aa vcxTuvQFiB5h1UuHpYb/o22yctNkQT2FLGnPqMnPVu64pSAWGpBBHntI4V9K+ifM 0JxKjA== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3ygd70mehd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 03 Jun 2024 11:29:34 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id A025540048; Mon, 3 Jun 2024 11:29:29 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 8DB452132DF; Mon, 3 Jun 2024 11:28:18 +0200 (CEST) Received: from localhost (10.48.86.164) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 3 Jun 2024 11:28:18 +0200 From: Christophe Roullier To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Richard Cochran , Jose Abreu , Liam Girdwood , Mark Brown , Christophe Roullier , Marek Vasut CC: , , , , Subject: [PATCH v3 04/11] net: stmmac: dwmac-stm32: Extract PMCR configuration Date: Mon, 3 Jun 2024 11:27:50 +0200 Message-ID: <20240603092757.71902-5-christophe.roullier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240603092757.71902-1-christophe.roullier@foss.st.com> References: <20240603092757.71902-1-christophe.roullier@foss.st.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-06-03_06,2024-05-30_01,2024-05-17_01 X-Patchwork-Delegate: kuba@kernel.org From: Marek Vasut Pull the PMCR clock mux configuration into a separate function. This is the final change of three, which moves external clock rate validation, external clock selector decoding, and clock mux configuration into separate functions. This should make the code easier to undrestand. No functional change intended. Signed-off-by: Marek Vasut --- .../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 27 ++++++++++++------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c index e552cc25fb808..3fedb447970a6 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c @@ -222,15 +222,11 @@ static int stm32mp1_validate_ethck_rate(struct plat_stmmacenet_data *plat_dat) return -EINVAL; } -static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat) +static int stm32mp1_configure_pmcr(struct plat_stmmacenet_data *plat_dat) { struct stm32_dwmac *dwmac = plat_dat->bsp_priv; u32 reg = dwmac->mode_reg; - int val, ret; - - ret = stm32mp1_select_ethck_external(plat_dat); - if (ret) - return ret; + int val; switch (plat_dat->mac_interface) { case PHY_INTERFACE_MODE_MII: @@ -265,10 +261,6 @@ static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat) return -EINVAL; } - ret = stm32mp1_validate_ethck_rate(plat_dat); - if (ret) - return ret; - /* Need to update PMCCLRR (clear register) */ regmap_write(dwmac->regmap, reg + SYSCFG_PMCCLRR_OFFSET, dwmac->ops->syscfg_eth_mask); @@ -278,6 +270,21 @@ static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat) dwmac->ops->syscfg_eth_mask, val); } +static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat) +{ + int ret; + + ret = stm32mp1_select_ethck_external(plat_dat); + if (ret) + return ret; + + ret = stm32mp1_validate_ethck_rate(plat_dat); + if (ret) + return ret; + + return stm32mp1_configure_pmcr(plat_dat); +} + static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat) { struct stm32_dwmac *dwmac = plat_dat->bsp_priv;