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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin Cc: Alexei Starovoitov , Jesper Dangaard Brouer , John Fastabend , Daniel Borkmann , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, bpf@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH RFC net-next v2 15/17] net: stmmac: Move internal PCS ISR to stmmac_pcs.c Date: Mon, 24 Jun 2024 16:26:32 +0300 Message-ID: <20240624132802.14238-7-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Similarly to the PHYLINK PCS ops, the STMMAC PCS ISR can be now fully implemented in the stmmac_pcs.c file. As before this change the resultant method will be called from the DW GMAC and DW QoS Eth core interrupt handlers. Signed-off-by: Serge Semin --- Note the AN Complete and Link state changes now cause the PHYLINK PCS state update. --- .../ethernet/stmicro/stmmac/dwmac1000_core.c | 9 +---- .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 9 +---- .../net/ethernet/stmicro/stmmac/stmmac_pcs.c | 33 +++++++++++++++++++ .../net/ethernet/stmicro/stmmac/stmmac_pcs.h | 31 ++--------------- 4 files changed, 38 insertions(+), 44 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c index 332018ecd624..2d77ffd16f0a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c @@ -296,14 +296,7 @@ static int dwmac1000_irq_status(struct mac_device_info *hw, x->irq_rx_path_exit_lpi_mode_n++; } - dwmac_pcs_isr(hw->priv->pcsaddr, intr_status, x); - - if (intr_status & PCS_RGSMIIIS_IRQ) { - /* TODO Dummy-read to clear the IRQ status */ - readl(ioaddr + GMAC_RGSMIIIS); - phylink_pcs_change(&hw->mac_pcs, false); - x->irq_rgmii_n++; - } + dwmac_pcs_isr(hw, intr_status, x); return ret; } diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c index 1487f5cc5249..c58dc20eddeb 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c @@ -860,14 +860,7 @@ static int dwmac4_irq_status(struct mac_device_info *hw, x->irq_rx_path_exit_lpi_mode_n++; } - dwmac_pcs_isr(hw->priv->pcsaddr, intr_status, x); - - if (intr_status & PCS_RGSMIIIS_IRQ) { - /* TODO Dummy-read to clear the IRQ status */ - readl(ioaddr + GMAC_PHYIF_CONTROL_STATUS); - phylink_pcs_change(&hw->mac_pcs, false); - x->irq_rgmii_n++; - } + dwmac_pcs_isr(hw, intr_status, x); return ret; } diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c index 24b95d1fdb64..aac49f6472f0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c @@ -134,3 +134,36 @@ const struct phylink_pcs_ops dwmac_pcs_ops = { .pcs_get_state = dwmac_pcs_get_state, }; + +void dwmac_pcs_isr(struct mac_device_info *hw, unsigned int intr_status, + struct stmmac_extra_stats *x) +{ + struct stmmac_priv *priv = hw->priv; + bool an_status = false, sr_status = false; + + if (intr_status & PCS_ANE_IRQ) { + x->irq_pcs_ane_n++; + an_status = true; + } + + if (intr_status & PCS_LINK_IRQ) { + x->irq_pcs_link_n++; + an_status = true; + } + + if (intr_status & PCS_RGSMIIIS_IRQ) { + x->irq_rgmii_n++; + sr_status = true; + } + + /* Read the AN and SGMII/RGMII/SMII status regs to clear IRQ */ + if (an_status) + readl(priv->pcsaddr + PCS_AN_STATUS); + + if (sr_status) + readl(priv->pcsaddr + PCS_SRGMII_CSR); + + /* Any PCS event shall trigger the PHYLINK PCS state update */ + if (an_status || sr_status) + phylink_pcs_change(&hw->mac_pcs, false); +} diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h index 2baebb92bea7..6e364285a4ef 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h @@ -23,6 +23,7 @@ #define PCS_ANE_LPA 0x0c /* ANE link partener ability */ #define PCS_ANE_EXP 0x10 /* ANE expansion */ #define PCS_TBI_EXT 0x14 /* TBI extended status */ +#define PCS_SRGMII_CSR 0x18 /* SGMII/RGMII/SMII CSR */ /* AN Configuration defines */ #define PCS_AN_CTRL_RAN BIT(9) /* Restart Auto-Negotiation */ @@ -57,33 +58,7 @@ #define PCS_CFG_JABTO BIT(4) /* Jabber Timeout (SMII only) */ #define PCS_CFG_FALSCARDET BIT(5) /* False Carrier (SMII only) */ -/** - * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR - * @ioaddr: IO registers pointer - * @intr_status: GMAC core interrupt status - * @x: pointer to log these events as stats - * Description: it is the ISR for PCS events: Auto-Negotiation Completed and - * Link status. - */ -static inline void dwmac_pcs_isr(void __iomem *pcsaddr, - unsigned int intr_status, - struct stmmac_extra_stats *x) -{ - u32 val = readl(pcsaddr + PCS_AN_STATUS); - - if (intr_status & PCS_ANE_IRQ) { - x->irq_pcs_ane_n++; - if (val & PCS_AN_STATUS_ANC) - pr_info("stmmac_pcs: ANE process completed\n"); - } - - if (intr_status & PCS_LINK_IRQ) { - x->irq_pcs_link_n++; - if (val & PCS_AN_STATUS_LS) - pr_info("stmmac_pcs: Link Up\n"); - else - pr_info("stmmac_pcs: Link Down\n"); - } -} +void dwmac_pcs_isr(struct mac_device_info *hw, unsigned int intr_status, + struct stmmac_extra_stats *x); #endif /* __STMMAC_PCS_H__ */