diff mbox series

[RFC,net-next,v2,17/17] net: stmmac: pcs: Drop the _SHIFT macros

Message ID 20240624132802.14238-9-fancer.lancer@gmail.com (mailing list archive)
State RFC
Delegated to: Netdev Maintainers
Headers show
Series net: stmmac: convert stmmac "pcs" to phylink | expand

Commit Message

Serge Semin June 24, 2024, 1:26 p.m. UTC
The PCS_ANE_PSE_SHIFT and PCS_ANE_RFE_SHIFT are unused anyway. Moreover
PCS_ANE_PSE and PCS_ANE_RFE are the respective field masks. So the
FIELD_GET()/FIELD_SET() macro-functions can be used to get/set the fields
content. Drop the _SHIFT macros for good then.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h | 2 --
 1 file changed, 2 deletions(-)

Comments

Russell King (Oracle) June 28, 2024, 2:42 p.m. UTC | #1
On Mon, Jun 24, 2024 at 04:26:34PM +0300, Serge Semin wrote:
> The PCS_ANE_PSE_SHIFT and PCS_ANE_RFE_SHIFT are unused anyway. Moreover
> PCS_ANE_PSE and PCS_ANE_RFE are the respective field masks. So the
> FIELD_GET()/FIELD_SET() macro-functions can be used to get/set the fields
> content. Drop the _SHIFT macros for good then.
> 
> Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
> ---
>  drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> index a17e5b37c411..0f15c9898788 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> @@ -43,9 +43,7 @@
>  #define PCS_ANE_FD		BIT(5)		/* AN Full-duplex flag */
>  #define PCS_ANE_HD		BIT(6)		/* AN Half-duplex flag */
>  #define PCS_ANE_PSE		GENMASK(8, 7)	/* AN Pause Encoding */
> -#define PCS_ANE_PSE_SHIFT	7
>  #define PCS_ANE_RFE		GENMASK(13, 12)	/* AN Remote Fault Encoding */
> -#define PCS_ANE_RFE_SHIFT	12
>  #define PCS_ANE_ACK		BIT(14)		/* AN Base-page acknowledge */

I would actually like to see all these go away.

PCS_ANE_FD == LPA_1000XFULL
PCS_ANE_HD == LPA_1000XHALF
PCS_ANE_PSE == LPA_1000XPAUSE and LPA_1000XPAUSE_ASYM
PCS_ANE_RFE == LPA_RESV and LPA_RFAULT
PCS_ANE_ACK == LPA_LPACK

Isn't it rather weird that the field layout matches 802.3z aka
1000base-X and not SGMII? This layout would not make sense for Cisco
SGMII as it loses the speed information conveyed by the Cisco SGMII
control word.

This isn't a case of the manufacturer using "SGMII" to mean a serial
gigabit media independent interface that supports 1000base-X
(PHY_INTERFACE_MODE_1000BASEX) rather than Cisco SGMII
(PHY_INTERFACE_MODE_SGMII) ?
Serge Semin July 4, 2024, 1:19 p.m. UTC | #2
On Fri, Jun 28, 2024 at 03:42:41PM +0100, Russell King (Oracle) wrote:
> On Mon, Jun 24, 2024 at 04:26:34PM +0300, Serge Semin wrote:
> > The PCS_ANE_PSE_SHIFT and PCS_ANE_RFE_SHIFT are unused anyway. Moreover
> > PCS_ANE_PSE and PCS_ANE_RFE are the respective field masks. So the
> > FIELD_GET()/FIELD_SET() macro-functions can be used to get/set the fields
> > content. Drop the _SHIFT macros for good then.
> > 
> > Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
> > ---
> >  drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h | 2 --
> >  1 file changed, 2 deletions(-)
> > 
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> > index a17e5b37c411..0f15c9898788 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> > @@ -43,9 +43,7 @@
> >  #define PCS_ANE_FD		BIT(5)		/* AN Full-duplex flag */
> >  #define PCS_ANE_HD		BIT(6)		/* AN Half-duplex flag */
> >  #define PCS_ANE_PSE		GENMASK(8, 7)	/* AN Pause Encoding */
> > -#define PCS_ANE_PSE_SHIFT	7
> >  #define PCS_ANE_RFE		GENMASK(13, 12)	/* AN Remote Fault Encoding */
> > -#define PCS_ANE_RFE_SHIFT	12
> >  #define PCS_ANE_ACK		BIT(14)		/* AN Base-page acknowledge */
> 

> I would actually like to see all these go away.
> 
> PCS_ANE_FD == LPA_1000XFULL
> PCS_ANE_HD == LPA_1000XHALF
> PCS_ANE_PSE == LPA_1000XPAUSE and LPA_1000XPAUSE_ASYM
> PCS_ANE_RFE == LPA_RESV and LPA_RFAULT
> PCS_ANE_ACK == LPA_LPACK

Great! It will be even better.

> 
> Isn't it rather weird that the field layout matches 802.3z aka
> 1000base-X and not SGMII? This layout would not make sense for Cisco
> SGMII as it loses the speed information conveyed by the Cisco SGMII
> control word.
> 
> This isn't a case of the manufacturer using "SGMII" to mean a serial
> gigabit media independent interface that supports 1000base-X
> (PHY_INTERFACE_MODE_1000BASEX) rather than Cisco SGMII
> (PHY_INTERFACE_MODE_SGMII) ?

It's not that weird. The only CSRs available and functional for SGMII
PCS are PCS_AN_CTRL and PCS_AN_STATUS (plus PCS_SRGMII_CSR where the
PCS exposes the link status, aka Cisco SGMII tx_config_reg[15:0] with
the vendor-specific layout). Registers from PCS_ANE_ADV up to PCS_TBI_EXT
exist for TBI and RTBI PCS only. Since TBI is defined in the IEEE
802.3z C36 I guess that's why the layout matches to what is described
in IEEE 802.3z C37.

-Serge(y)

> 
> -- 
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
diff mbox series

Patch

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
index a17e5b37c411..0f15c9898788 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
@@ -43,9 +43,7 @@ 
 #define PCS_ANE_FD		BIT(5)		/* AN Full-duplex flag */
 #define PCS_ANE_HD		BIT(6)		/* AN Half-duplex flag */
 #define PCS_ANE_PSE		GENMASK(8, 7)	/* AN Pause Encoding */
-#define PCS_ANE_PSE_SHIFT	7
 #define PCS_ANE_RFE		GENMASK(13, 12)	/* AN Remote Fault Encoding */
-#define PCS_ANE_RFE_SHIFT	12
 #define PCS_ANE_ACK		BIT(14)		/* AN Base-page acknowledge */
 
 /* SGMII/RGMII/SMII link status register */