From patchwork Wed Jun 26 16:43:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Chan X-Patchwork-Id: 13713190 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-qk1-f179.google.com (mail-qk1-f179.google.com [209.85.222.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B38D18FC6B for ; Wed, 26 Jun 2024 16:43:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.222.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719420225; cv=none; b=eA6l6f1F5xt5yE9xpYK8DLojA70ybvrPGjbMK3apNGordGUgNe99VXFpTjzRW0tbPtJZpprALHUW3byr7jSrfECEXrh1Tf7s3wBJR831zgQ1gKs1SGrSxQWgNAJTMc1B8U2jaElymLQ68ixd/MHmlBnLiWQr8l7B+E+sZC7nt5g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719420225; c=relaxed/simple; bh=+bvu2TIzbRaPGNdEFauHV/5vdqZZxUadEXmEbizd4vE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XvT0J8j3+Q37RhxF+WPwyjxfpsZlZ7sKgfeTFSR/jY05Nx5rO11NYb1WVHgRn+e37DhIB04UX9aGK6luhsOdFvOJ2uo/SrPy4MSCWSf+ES5OhoMmh7ZDoX6C6ze/SPE0pcwplYyPZvSYNfL00l4YD0vmHVQ8b9mWAF6E0dk5rU0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com; spf=fail smtp.mailfrom=broadcom.com; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b=LFz6eU7K; arc=none smtp.client-ip=209.85.222.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=broadcom.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="LFz6eU7K" Received: by mail-qk1-f179.google.com with SMTP id af79cd13be357-79c2c05638cso94315285a.3 for ; Wed, 26 Jun 2024 09:43:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1719420223; x=1720025023; darn=vger.kernel.org; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:from:to:cc:subject:date:message-id:reply-to; bh=xEQAwPPZKAgg3hj+X5edaTN5tGC1XD/ScCUUTaK06vI=; b=LFz6eU7KbiOTVDIFBapL+68GVQN7nZ+V8u+82trVt2zFn+Uitin9BQ5psBHyaV79kB vb9w/692u0LXiPPOxLaQ3oH13dR/eaTAxPLaXFqghrUYUXgnVGB/CLzIYNuheil3urDr WT1evzpNjIk+lNM+Xh5KnCL1wbvd3UTi46XAI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719420223; x=1720025023; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=xEQAwPPZKAgg3hj+X5edaTN5tGC1XD/ScCUUTaK06vI=; b=NTKO1AI0b1+PGKG+kEXmZzwoGa3O69l3ysPFDYkMN8YHZJiak6BftH+VPhfy7DiAhL jkif7aCLi/TChuV6owCRBMDaBJ6vr/dcRYo3Ivb/4wFJXUYxiotZt65MR/xdgm6rP4eY 81zMi4WGiJunT2KyKsvvhRQF9eady5+ywy9aBskXgm4eotG4teqYqehCkwk6BA25PqU0 bPSQ1sKvltRCeoWFD7NB9dNFrBJd955e/pOQIJT4Sr43JNeHqKQqUwfrDADfecnCn5AO Dk8UITGvJP1++rwI38Nm2IOKcceyA5iGzNZgjpAw1K2cxlci2mJriHcXKXN0zHFmwX/V p8Pw== X-Gm-Message-State: AOJu0YzG/L86G/ONaLKkoeVjcZMwKmR711sXKzA+pjaE9NGV51b3FCXy aKu8+xM8IJZE0xIDI34muhMhT+7PyfowHq/Fi7craL6JgUpe9cfCI1TltkiwRg== X-Google-Smtp-Source: AGHT+IG3nhQTW/mGKYJLRLAl+CVCkqjnMfB0OVurwx3XPHKXx6US3XlQBji3k2zNzeZrKVpupCRROA== X-Received: by 2002:a05:620a:2949:b0:79b:ef62:4ecf with SMTP id af79cd13be357-79bef625027mr1139247885a.1.1719420219722; Wed, 26 Jun 2024 09:43:39 -0700 (PDT) Received: from lvnvda5233.lvn.broadcom.net ([192.19.161.250]) by smtp.gmail.com with ESMTPSA id af79cd13be357-79d53c42aafsm53570485a.58.2024.06.26.09.43.38 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 26 Jun 2024 09:43:39 -0700 (PDT) From: Michael Chan To: davem@davemloft.net Cc: netdev@vger.kernel.org, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, pavan.chebbi@broadcom.com, andrew.gospodarek@broadcom.com, richardcochran@gmail.com Subject: [PATCH net-next 05/10] bnxt_en: Add BCM5760X specific PHC registers mapping Date: Wed, 26 Jun 2024 09:43:02 -0700 Message-ID: <20240626164307.219568-6-michael.chan@broadcom.com> X-Mailer: git-send-email 2.43.4 In-Reply-To: <20240626164307.219568-1-michael.chan@broadcom.com> References: <20240626164307.219568-1-michael.chan@broadcom.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Pavan Chebbi BCM5760X firmware will advertise direct 64-bit PHC registers access for the driver from BAR0. Make the necessary changes in handling HWRM_PORT_MAC_PTP_QCFG's response and PHC register mapping for 5760X chips. Signed-off-by: Pavan Chebbi Signed-off-by: Michael Chan --- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 12 ++++++++---- drivers/net/ethernet/broadcom/bnxt/bnxt.h | 8 ++++++++ drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c | 10 +++++++++- 3 files changed, 25 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c index e16f50d822c8..93858df547b2 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c @@ -9012,7 +9012,7 @@ static int __bnxt_hwrm_ptp_qcfg(struct bnxt *bp) u8 flags; int rc; - if (bp->hwrm_spec_code < 0x10801 || !BNXT_CHIP_P5(bp)) { + if (bp->hwrm_spec_code < 0x10801 || !BNXT_CHIP_P5_PLUS(bp)) { rc = -ENODEV; goto no_ptp; } @@ -9028,7 +9028,8 @@ static int __bnxt_hwrm_ptp_qcfg(struct bnxt *bp) goto exit; flags = resp->flags; - if (!(flags & PORT_MAC_PTP_QCFG_RESP_FLAGS_HWRM_ACCESS)) { + if (BNXT_CHIP_P5_AND_MINUS(bp) && + !(flags & PORT_MAC_PTP_QCFG_RESP_FLAGS_HWRM_ACCESS)) { rc = -ENODEV; goto exit; } @@ -9041,10 +9042,13 @@ static int __bnxt_hwrm_ptp_qcfg(struct bnxt *bp) ptp->bp = bp; bp->ptp_cfg = ptp; } - if (flags & PORT_MAC_PTP_QCFG_RESP_FLAGS_PARTIAL_DIRECT_ACCESS_REF_CLOCK) { + + if (flags & + (PORT_MAC_PTP_QCFG_RESP_FLAGS_PARTIAL_DIRECT_ACCESS_REF_CLOCK | + PORT_MAC_PTP_QCFG_RESP_FLAGS_64B_PHC_TIME)) { ptp->refclk_regs[0] = le32_to_cpu(resp->ts_ref_clock_reg_lower); ptp->refclk_regs[1] = le32_to_cpu(resp->ts_ref_clock_reg_upper); - } else if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { + } else if (BNXT_CHIP_P5(bp)) { ptp->refclk_regs[0] = BNXT_TS_REG_TIMESYNC_TS0_LOWER; ptp->refclk_regs[1] = BNXT_TS_REG_TIMESYNC_TS0_UPPER; } else { diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.h b/drivers/net/ethernet/broadcom/bnxt/bnxt.h index 12d6d17936a9..82b05641953f 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.h +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.h @@ -2263,9 +2263,17 @@ struct bnxt { (BNXT_CHIP_NUM_58700((bp)->chip_num) && \ !BNXT_CHIP_TYPE_NITRO_A0(bp))) +/* Chip class phase 3.x */ +#define BNXT_CHIP_P3(bp) \ + (BNXT_CHIP_NUM_57X0X((bp)->chip_num) || \ + BNXT_CHIP_TYPE_NITRO_A0(bp)) + #define BNXT_CHIP_P4_PLUS(bp) \ (BNXT_CHIP_P4(bp) || BNXT_CHIP_P5_PLUS(bp)) +#define BNXT_CHIP_P5_AND_MINUS(bp) \ + (BNXT_CHIP_P3(bp) || BNXT_CHIP_P4(bp) || BNXT_CHIP_P5(bp)) + struct bnxt_aux_priv *aux_priv; struct bnxt_en_dev *edev; diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c index 0ca7bc75616b..a3795ef8887d 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c @@ -656,6 +656,14 @@ static int bnxt_map_ptp_regs(struct bnxt *bp) (ptp->refclk_regs[i] & BNXT_GRC_OFFSET_MASK); return 0; } + if (bp->flags & BNXT_FLAG_CHIP_P7) { + for (i = 0; i < 2; i++) { + if (reg_arr[i] & BNXT_GRC_BASE_MASK) + return -EINVAL; + ptp->refclk_mapped_regs[i] = reg_arr[i]; + } + return 0; + } return -ENODEV; } @@ -1018,7 +1026,7 @@ int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg) ptp->stats.ts_lost = 0; atomic64_set(&ptp->stats.ts_err, 0); - if (BNXT_CHIP_P5(bp)) { + if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { spin_lock_bh(&ptp->ptp_lock); bnxt_refclk_read(bp, NULL, &ptp->current_time); WRITE_ONCE(ptp->old_time, ptp->current_time);