From patchwork Thu Jun 27 18:02:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tariq Toukan X-Patchwork-Id: 13714970 X-Patchwork-Delegate: kuba@kernel.org Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2058.outbound.protection.outlook.com [40.107.236.58]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C02E419AA7B for ; Thu, 27 Jun 2024 18:04:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.236.58 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719511493; cv=fail; b=a+N/QHkTGNuwN1pvSjoAMc3P7D+2YPZ5oaTBktBgPfF7aATsNYRdAfsR0LxHekPeIGYJjhQ9ZADj/wov6KPjdGxKym4vITcgylt0W8f5n+JHjPzo8QFj2+KQAze1vgOyagrh40TzzptqnRFU0B5v5Xn/wXm6VN5cZ0PCbazp5ks= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719511493; c=relaxed/simple; bh=LStAbE9vpO/sIAT/4See3RWQmxNTtiVg9lDExW0cLOQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fAcxVUeiOFWukSmWQcTOyl+7MTlfUcqf64rCVbH7OZULsZ575mMZIj9Jt468FIiOUE7fhF7oPRDAYeYeqRsvQS0vm02l0RqDHoQROeNzJcFTlmMYvsccjDCLEes67jSnNL08WOYPipTV0tv2qjfbY5NldYxEelcGRzbZryuQ0p8= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=PdMjuwgD; arc=fail smtp.client-ip=40.107.236.58 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="PdMjuwgD" ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Txg39X2UgVjfGE/Gle0V6vz8t2ETBySIUPoOiR1kzna/aJv0usoRyh7CWtBQww5usF67xiOVsHZaSa/MplqfHu5s27cJ6I88LDxioXhzhpUGalHinJ49g7q+rFhpw6Sh6PalZwL0TTKq5lldDnmJMlEBvCsjlB26U+43YCdWSRvUXm4s4SUuPnBFeSBzoXx4Qp2wLOWHvNStkPymhcQ2kcLXGHRGmz4ny0d+ZpA5CWkNDXbHH4j/lM5q88FXZn1nPtlMVVO4GMMAd2qbD1+S1pX6Lqtn8F4ij0dQvnP1LHOaTdSvzur8/2iseMD2CwtihOli8agl/ZrX4lYXo9VAww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=s3PKK+BN3vPx9Db4iy/hS26Whh5E64+zPiV3w2Wl4vA=; b=ScPqPQKmdrb6S2jTAr68ot80J7JrW+XkLwZ2kSSM88NSipf8mBY3DGLcELJYlSEPA73uijbm0TAajdkjpQukr9+WDy5NMTSBkk8AhloIq+g2q3v91aNrscZA3G3ncDSKS8lMqTlBvjgKFG1YECO9boW7DG0H0bg+sAWXxtLdAEGdSsp9kbj0rXqs8NahoQtKxMD+c3EWv/Smof/lL/zNVBkJeIEygsH1+nfykPi7PsOwDKD8hFwPBpUWQXMmq+TBh1/Jhtmgjxw6129P8uHo9ise9k6fRnPOfBWUJU1kAamq2Z6f4Jm1+KWUkslkTftobhfYPbYXMv0ndUw6fIVlgQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=davemloft.net smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=s3PKK+BN3vPx9Db4iy/hS26Whh5E64+zPiV3w2Wl4vA=; b=PdMjuwgDLmm3GOA6i23EVgWYIy4RKn2F+msD9xYly5hRlsz53iHpTgfzvwkoSxafNvfL5ozXjRzvwqrR+HQg09Za7Q2aIVWY5Dd7HJEiDZ5ZTrpDgE1TDuw38enDD7jKTOfCjs07RvCwAMb/um0pJbp/LuAwBYYJ5RbBygKidgYWE50z7InvuOVdRXbW1oIwSW5s6uz3vZ6x16OrbuUH2y9zMDhU66XL4Z36yz1kz3f3WUMdoR6ajjQIOxaCEPAjV+FWCA5+nG388oPbIMVBp+gvCb53/1cPXuikvQUnJVBsExIprukDZmiH/KUh5/owML+XBNaHhhYSIOQ5omZPAg== Received: from PH7P220CA0048.NAMP220.PROD.OUTLOOK.COM (2603:10b6:510:32b::19) by DS7PR12MB5909.namprd12.prod.outlook.com (2603:10b6:8:7a::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7698.32; Thu, 27 Jun 2024 18:04:31 +0000 Received: from MWH0EPF000A672E.namprd04.prod.outlook.com (2603:10b6:510:32b:cafe::44) by PH7P220CA0048.outlook.office365.com (2603:10b6:510:32b::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7719.25 via Frontend Transport; Thu, 27 Jun 2024 18:04:30 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by MWH0EPF000A672E.mail.protection.outlook.com (10.167.249.20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7677.15 via Frontend Transport; Thu, 27 Jun 2024 18:04:30 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 27 Jun 2024 11:04:00 -0700 Received: from drhqmail202.nvidia.com (10.126.190.181) by drhqmail203.nvidia.com (10.126.190.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 27 Jun 2024 11:04:00 -0700 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.181) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 27 Jun 2024 11:03:57 -0700 From: Tariq Toukan To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Daniel Jurgens , Parav Pandit , Tariq Toukan Subject: [PATCH net V2 3/7] net/mlx5: Use max_num_eqs_24b when setting max_io_eqs Date: Thu, 27 Jun 2024 21:02:36 +0300 Message-ID: <20240627180240.1224975-4-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240627180240.1224975-1-tariqt@nvidia.com> References: <20240627180240.1224975-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000A672E:EE_|DS7PR12MB5909:EE_ X-MS-Office365-Filtering-Correlation-Id: fa7355ea-124a-46ea-518c-08dc96d397a5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700013; X-Microsoft-Antispam-Message-Info: kV+kGYnn3YwHYU8jxquxdHUEyLMU0szGZQNLLf46f76FdRUv+WdEKLNQZ0rBkLxulcTlNR/r2x99tHli4LrmXdLH6vfLecjAu53G00Z1AN+qnPzxQwfgWh1p/k01x9yu8RB7xXui+vrTx8WNh4nsSKGWGfLFra1aHhdUdjfQuAClVcfRyMagtidTpDInpJT2+b3V5zy1R6szTaAx+LhncE0tP7pWr0jcDSQB06IiKICGhdIMcSO2lZ3qhMKRKlucIgZeKR72p16PTlcJxcFLYD/C9bHWdBjs6M1MU4bBpGQI2CyzPr8djPI7gSHLcuDSXA7OvaXl1nsk0E2N2RTBn0XeTXm92E6HgKTuiGnzviBTr7CNwYHUaceQQ4LuLpoGcy8aUXk36oaUb8SGKDKBHPUfbyMuL8lqvPwgr+4/tXmMT+CvXoGATUltMl3kZ+g9J495+1Rat5ei2U9ZL+1cNr5DY7Oqc6d105im62BqbWS9RgbNaJ8wnRR8SMxj/kYGsKB9bbu/7BucnvnOQU7AwGC+yRcoHN8glU408OsBBYUalNke/zS1D8qCIM9fQaCYCEPqhDyiE/av4qGfToQvZdjQh4Fhk7bEx3OoyR0rsMV3IC8v4MfqGTzl+Doek81nGaPI2SkbQ5DNzf3faqs2hf9veLcssiueQXD2P76IQmKPBofAu9z5CHjVlxUEVxk3rtTkUkZMcjKlZWRS9i9NjeXdFkFUfApskgxsZgQWJdEI+FgjHI/iKhV4MUoWGqe6iORHx4zlh9fHaWz6shHaHTrGNsGVv6DU5Oqp2bWlvnKAR3qfrsWoiP2++tJwGI1nXxUpPipgYNoGu7eShgWwlC6APQ1q247meGEgRk5mqhYdkaFae3zn2WBncUy3xNwFVD66HqUHhUwB06fZnI8ok0TeQooRPAoERVHrkpdFOj5Lww54Hhc361iXtX9F5+N7c7SfiPd+b8yhNI0+QABHGyP5yjW2zlkBYDPet+J8u14fwddmWGBRb55gfzGTQRejERu4k20MOEheh3dlIKI/Iz38EFxdRHhvX8xNQjvQ9RyXVxElI2hZjcX5T0V9PUt7/BN9vbkDuu0/za4nmwpTkiKNpxZqmPTGc5Mb1r5AQalbz+2bZMOq4MSZefBbQ4uCpZPHqejbMjW2gIWjfuCAprKacFSc6s/PsNQj4delUN4lvNTvbzQJWgH8wAp145kh1C6lpo9OUFKqvw7sY2YZin1Fi20TcmPg2UY2TcUYv+8M7KpNg+3PIYdhHtfYhhvnKEhqLxorrh+4HCUaJSpCbC7ttu/1GVrPnvNqRwkKCIYCmM2UO5tyZjAvyXAA5j3gpZh2cECPFUDY48KN69/xJW9QmyOU8DjgSpbcV/q/GkZFV+L5FDZ+K+xzvbVGlGQijdFLdMYjvItw8l5xlSoorVvbhc07554JMzwxVBqcbBoduwyBs+YFMknE2sHSWKBg X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jun 2024 18:04:30.5133 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fa7355ea-124a-46ea-518c-08dc96d397a5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A672E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5909 X-Patchwork-Delegate: kuba@kernel.org From: Daniel Jurgens Due a bug in the device max_num_eqs doesn't always reflect a written value. As a result, setting max_io_eqs may not work but appear successful. Instead write max_num_eqs_24b, which reflects correct value. Fixes: 93197c7c509d ("mlx5/core: Support max_io_eqs for a function") Signed-off-by: Daniel Jurgens Reviewed-by: Parav Pandit Signed-off-by: Tariq Toukan --- .../mellanox/mlx5/core/eswitch_offloads.c | 22 ++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c index 592143d5e1da..72949cb85244 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c @@ -4600,20 +4600,26 @@ mlx5_devlink_port_fn_max_io_eqs_get(struct devlink_port *port, u32 *max_io_eqs, return -EOPNOTSUPP; } + if (!MLX5_CAP_GEN_2(esw->dev, max_num_eqs_24b)) { + NL_SET_ERR_MSG_MOD(extack, + "Device doesn't support getting the max number of EQs"); + return -EOPNOTSUPP; + } + query_ctx = kzalloc(query_out_sz, GFP_KERNEL); if (!query_ctx) return -ENOMEM; mutex_lock(&esw->state_lock); err = mlx5_vport_get_other_func_cap(esw->dev, vport_num, query_ctx, - MLX5_CAP_GENERAL); + MLX5_CAP_GENERAL_2); if (err) { NL_SET_ERR_MSG_MOD(extack, "Failed getting HCA caps"); goto out; } hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability); - max_eqs = MLX5_GET(cmd_hca_cap, hca_caps, max_num_eqs); + max_eqs = MLX5_GET(cmd_hca_cap_2, hca_caps, max_num_eqs_24b); if (max_eqs < MLX5_ESW_MAX_CTRL_EQS) *max_io_eqs = 0; else @@ -4644,6 +4650,12 @@ mlx5_devlink_port_fn_max_io_eqs_set(struct devlink_port *port, u32 max_io_eqs, return -EOPNOTSUPP; } + if (!MLX5_CAP_GEN_2(esw->dev, max_num_eqs_24b)) { + NL_SET_ERR_MSG_MOD(extack, + "Device doesn't support changing the max number of EQs"); + return -EOPNOTSUPP; + } + if (check_add_overflow(max_io_eqs, MLX5_ESW_MAX_CTRL_EQS, &max_eqs)) { NL_SET_ERR_MSG_MOD(extack, "Supplied value out of range"); return -EINVAL; @@ -4655,17 +4667,17 @@ mlx5_devlink_port_fn_max_io_eqs_set(struct devlink_port *port, u32 max_io_eqs, mutex_lock(&esw->state_lock); err = mlx5_vport_get_other_func_cap(esw->dev, vport_num, query_ctx, - MLX5_CAP_GENERAL); + MLX5_CAP_GENERAL_2); if (err) { NL_SET_ERR_MSG_MOD(extack, "Failed getting HCA caps"); goto out; } hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability); - MLX5_SET(cmd_hca_cap, hca_caps, max_num_eqs, max_eqs); + MLX5_SET(cmd_hca_cap_2, hca_caps, max_num_eqs_24b, max_eqs); err = mlx5_vport_set_other_func_cap(esw->dev, hca_caps, vport_num, - MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE); + MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE2); if (err) NL_SET_ERR_MSG_MOD(extack, "Failed setting HCA caps");