diff mbox series

[net-next,3/6] net: phy: dp83869: Ensure that the FORCE_LINK_GOOD bit is cleared

Message ID 20240701-b4-dp83869-sfp-v1-3-a71d6d0ad5f8@bootlin.com (mailing list archive)
State Changes Requested
Delegated to: Netdev Maintainers
Headers show
Series net: phy: dp83869: Add support for downstream SFP cages | expand

Checks

Context Check Description
netdev/series_format success Posting correctly formatted
netdev/tree_selection success Clearly marked for net-next
netdev/ynl success Generated files up to date; no warnings/errors; no diff in generated;
netdev/fixes_present success Fixes tag not required for -next series
netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 839 this patch: 839
netdev/build_tools success No tools touched, skip
netdev/cc_maintainers success CCed 7 of 7 maintainers
netdev/build_clang success Errors and warnings before: 846 this patch: 846
netdev/verify_signedoff success Signed-off-by tag matches author and committer
netdev/deprecated_api success None detected
netdev/check_selftest success No net selftest shell script
netdev/verify_fixes success No Fixes tag
netdev/build_allmodconfig_warn success Errors and warnings before: 846 this patch: 846
netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 54 lines checked
netdev/build_clang_rust success No Rust files in patch. Skipping build
netdev/kdoc success Errors and warnings before: 0 this patch: 0
netdev/source_inline success Was 0 now: 0
netdev/contest success net-next-2024-07-01--15-00 (tests: 664)

Commit Message

Romain Gantois July 1, 2024, 8:51 a.m. UTC 
This bit is located in the PHY_CONTROL register and should be cleared on
reset. However, this is not always the case, which can cause unexpected
behavior such as link up being incorrectly reported as good when the
DP83869 is brought up directly in RGMII-SGMII bridge mode.

Make sure that this bit is cleared for all operational modes.

Signed-off-by: Romain Gantois <romain.gantois@bootlin.com>
---
 drivers/net/phy/dp83869.c | 29 +++++++++--------------------
 1 file changed, 9 insertions(+), 20 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/phy/dp83869.c b/drivers/net/phy/dp83869.c
index 6bb9bb1c0e962..579cf6f84e030 100644
--- a/drivers/net/phy/dp83869.c
+++ b/drivers/net/phy/dp83869.c
@@ -713,17 +713,20 @@  static int dp83869_configure_mode(struct phy_device *phydev,
 	if (ret)
 		return ret;
 
-	phy_ctrl_val = (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT |
+	/* The FORCE_LINK_GOOD bit 10 in the PHYCTRL register should be
+	 * unset after a hardware reset but it is not. make sure it is
+	 * cleared so that the PHY can function properly.
+	 * Also configure TX/RX FIFO depth for modes that require it.
+	 */
+	ret = phy_write(phydev, MII_DP83869_PHYCTRL,
+			dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT |
 			dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT |
 			DP83869_PHY_CTRL_DEFAULT);
+	if (ret)
+		return ret;
 
 	switch (dp83869->mode) {
 	case DP83869_RGMII_COPPER_ETHERNET:
-		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
-				phy_ctrl_val);
-		if (ret)
-			return ret;
-
 		ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT);
 		if (ret)
 			return ret;
@@ -746,28 +749,14 @@  static int dp83869_configure_mode(struct phy_device *phydev,
 
 		break;
 	case DP83869_1000M_MEDIA_CONVERT:
-		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
-				phy_ctrl_val);
-		if (ret)
-			return ret;
-
 		ret = phy_write_mmd(phydev, DP83869_DEVADDR,
 				    DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
 		if (ret)
 			return ret;
 		break;
 	case DP83869_100M_MEDIA_CONVERT:
-		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
-				phy_ctrl_val);
-		if (ret)
-			return ret;
 		break;
 	case DP83869_SGMII_COPPER_ETHERNET:
-		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
-				phy_ctrl_val);
-		if (ret)
-			return ret;
-
 		ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT);
 		if (ret)
 			return ret;