| Message ID | 20240708102716.1246571-2-kamilh@axis.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | net: phy: bcm5481x: add support for BroadR-Reach mode | expand |
On Mon, 8 Jul 2024 12:27:13 +0200 Kamil Horák (2N) wrote: > Introduce a new link mode necessary for 10 MBit single-pair > connection in BroadR-Reach mode on bcm5481x PHY by Broadcom. > This new link mode, 10baseT1BRR, is known as 1BR10 in the Broadcom > terminology. Another link mode to be used is 1BR100 and it is already > present as 100baseT1, because Broadcom's 1BR100 became 100baseT1 > (IEEE 802.3bw). > > Signed-off-by: Kamil Horák (2N) <kamilh@axis.com> > Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> > --- > drivers/net/phy/phy-core.c | 3 ++- > include/uapi/linux/ethtool.h | 1 + > net/ethtool/common.c | 3 +++ > + ETHTOOL_LINK_MODE_10baseT1BRR_Full_BIT = 102, Could we get an ack from phylib maintainers for the new mode?
On Mon, Jul 08, 2024 at 12:27:13PM +0200, Kamil Horák (2N) wrote: > Introduce a new link mode necessary for 10 MBit single-pair > connection in BroadR-Reach mode on bcm5481x PHY by Broadcom. > This new link mode, 10baseT1BRR, is known as 1BR10 in the Broadcom > terminology. Another link mode to be used is 1BR100 and it is already > present as 100baseT1, because Broadcom's 1BR100 became 100baseT1 > (IEEE 802.3bw). > > Signed-off-by: Kamil Horák (2N) <kamilh@axis.com> > Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
On Mon, Jul 08, 2024 at 12:27:13PM +0200, Kamil Horák (2N) wrote: > Introduce a new link mode necessary for 10 MBit single-pair > connection in BroadR-Reach mode on bcm5481x PHY by Broadcom. > This new link mode, 10baseT1BRR, is known as 1BR10 in the Broadcom > terminology. Another link mode to be used is 1BR100 and it is already > present as 100baseT1, because Broadcom's 1BR100 became 100baseT1 > (IEEE 802.3bw). > > Signed-off-by: Kamil Horák (2N) <kamilh@axis.com> > Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Does phylink also need to be updated? E.g. phylink_caps_to_linkmodes()
diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c index a235ea2264a7..1f98b6a96c15 100644 --- a/drivers/net/phy/phy-core.c +++ b/drivers/net/phy/phy-core.c @@ -13,7 +13,7 @@ */ const char *phy_speed_to_str(int speed) { - BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 102, + BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 103, "Enum ethtool_link_mode_bit_indices and phylib are out of sync. " "If a speed or mode has been added please update phy_speed_to_str " "and the PHY settings array.\n"); @@ -266,6 +266,7 @@ static const struct phy_setting settings[] = { PHY_SETTING( 10, FULL, 10baseT1S_Full ), PHY_SETTING( 10, HALF, 10baseT1S_Half ), PHY_SETTING( 10, HALF, 10baseT1S_P2MP_Half ), + PHY_SETTING( 10, FULL, 10baseT1BRR_Full ), }; #undef PHY_SETTING diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h index e011384c915c..54b31344961d 100644 --- a/include/uapi/linux/ethtool.h +++ b/include/uapi/linux/ethtool.h @@ -1863,6 +1863,7 @@ enum ethtool_link_mode_bit_indices { ETHTOOL_LINK_MODE_10baseT1S_Full_BIT = 99, ETHTOOL_LINK_MODE_10baseT1S_Half_BIT = 100, ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT = 101, + ETHTOOL_LINK_MODE_10baseT1BRR_Full_BIT = 102, /* must be last entry */ __ETHTOOL_LINK_MODE_MASK_NBITS diff --git a/net/ethtool/common.c b/net/ethtool/common.c index 6b2a360dcdf0..82ba2ca98d4c 100644 --- a/net/ethtool/common.c +++ b/net/ethtool/common.c @@ -211,6 +211,7 @@ const char link_mode_names[][ETH_GSTRING_LEN] = { __DEFINE_LINK_MODE_NAME(10, T1S, Full), __DEFINE_LINK_MODE_NAME(10, T1S, Half), __DEFINE_LINK_MODE_NAME(10, T1S_P2MP, Half), + __DEFINE_LINK_MODE_NAME(10, T1BRR, Full), }; static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS); @@ -251,6 +252,7 @@ static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS); #define __LINK_MODE_LANES_T1S_P2MP 1 #define __LINK_MODE_LANES_VR8 8 #define __LINK_MODE_LANES_DR8_2 8 +#define __LINK_MODE_LANES_T1BRR 1 #define __DEFINE_LINK_MODE_PARAMS(_speed, _type, _duplex) \ [ETHTOOL_LINK_MODE(_speed, _type, _duplex)] = { \ @@ -374,6 +376,7 @@ const struct link_mode_info link_mode_params[] = { __DEFINE_LINK_MODE_PARAMS(10, T1S, Full), __DEFINE_LINK_MODE_PARAMS(10, T1S, Half), __DEFINE_LINK_MODE_PARAMS(10, T1S_P2MP, Half), + __DEFINE_LINK_MODE_PARAMS(10, T1BRR, Full), }; static_assert(ARRAY_SIZE(link_mode_params) == __ETHTOOL_LINK_MODE_MASK_NBITS);