From patchwork Mon Jul 29 20:07:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Nguyen X-Patchwork-Id: 13745660 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EBCB018C325; Mon, 29 Jul 2024 20:07:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722283650; cv=none; b=lvZOXuvudubaMSz4sCkDYzOx7eT7pxAwz37ShcK/nPUyKTiRixv99WM5QshqhGLDhTZ5J5y02e+KBm6mn7jXtM1rCl66H1bS3UrQ7L1dqt8r13l//StCsPu3jFyMJxfSolwRO8R4hkUAMH4dO2/nRYZE2L02K66awz4IGgxMkCc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722283650; c=relaxed/simple; bh=3LAjuSxLYaetIQgXY8nT5M5q9x91e4EkU5j0UGqqOZg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qvzmAN2yVOPSu/iiv1BqIleRcMK+NjtXKsJss0Gk/IQpXfhMyu6/vzWzoIOgPn2/qUkEzQke1UaQTi67CsuthzpYPNrTfiqxldwYt4gnWT6ZajAhGh2FOMAtFVmB9DLeMskRpCkpYt9uqrIcmEQJX3Ew2lK6JjIhVSE/iARF+2o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=QLaINT9a; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QLaINT9a" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1722283649; x=1753819649; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3LAjuSxLYaetIQgXY8nT5M5q9x91e4EkU5j0UGqqOZg=; b=QLaINT9aWSqr+jNBiPxNQgu0//N0FZJZdJe4bZ/UkHz0NGcKhzlHjsPq q40uL6NxPrCGWF11QG4itM4uxUEUbCyWPV2Qwa1QnB/L4xzFkOuEaM+tL Owv3Z/w53bDvCiyTdnXYRNcsYSVnuIs9NgsYUQDGZ+a/tEJ3ye+T88g3L E3igyV6M39j5kvva9oXlrd54F0Yp9ADN6Nq7bCi8ifsrT7cNjR9fqqg+Q APa3RVgJYwAcE6cUvKL3voPBHxI41QYF+WPk2ppthNU/0okTXKW1zm+99 haz4npNhtjGBIlc7MQoxQtKWUJSnWXm1dCgpd+Dm7kWeOeMBy8eqfHOi6 g==; X-CSE-ConnectionGUID: T4uZA5yzQEGqh1nJQ0D4TA== X-CSE-MsgGUID: W89HRBBYQ7uosOeQ6zqGrA== X-IronPort-AV: E=McAfee;i="6700,10204,11148"; a="23818559" X-IronPort-AV: E=Sophos;i="6.09,246,1716274800"; d="scan'208";a="23818559" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jul 2024 13:07:23 -0700 X-CSE-ConnectionGUID: BZgJhSC2Rvik0XOdbffbLg== X-CSE-MsgGUID: OtZhgceITyemfhSVFShb3Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,246,1716274800"; d="scan'208";a="54681300" Received: from anguy11-upstream.jf.intel.com ([10.166.9.133]) by orviesa007.jf.intel.com with ESMTP; 29 Jul 2024 13:07:24 -0700 From: Tony Nguyen To: davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com, edumazet@google.com, netdev@vger.kernel.org Cc: Maciej Fijalkowski , anthony.l.nguyen@intel.com, magnus.karlsson@intel.com, aleksander.lobakin@intel.com, ast@kernel.org, daniel@iogearbox.net, hawk@kernel.org, john.fastabend@gmail.com, bpf@vger.kernel.org, Shannon Nelson , Chandan Kumar Rout Subject: [PATCH net v2 8/8] ice: xsk: fix txq interrupt mapping Date: Mon, 29 Jul 2024 13:07:14 -0700 Message-ID: <20240729200716.681496-9-anthony.l.nguyen@intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240729200716.681496-1-anthony.l.nguyen@intel.com> References: <20240729200716.681496-1-anthony.l.nguyen@intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Maciej Fijalkowski ice_cfg_txq_interrupt() internally handles XDP Tx ring. Do not use ice_for_each_tx_ring() in ice_qvec_cfg_msix() as this causing us to treat XDP ring that belongs to queue vector as Tx ring and therefore misconfiguring the interrupts. Fixes: 2d4238f55697 ("ice: Add support for AF_XDP") Reviewed-by: Shannon Nelson Tested-by: Chandan Kumar Rout (A Contingent Worker at Intel) Signed-off-by: Maciej Fijalkowski Signed-off-by: Tony Nguyen --- drivers/net/ethernet/intel/ice/ice_xsk.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_xsk.c b/drivers/net/ethernet/intel/ice/ice_xsk.c index ee084ad80a61..240a7bec242b 100644 --- a/drivers/net/ethernet/intel/ice/ice_xsk.c +++ b/drivers/net/ethernet/intel/ice/ice_xsk.c @@ -110,25 +110,29 @@ ice_qvec_dis_irq(struct ice_vsi *vsi, struct ice_rx_ring *rx_ring, * ice_qvec_cfg_msix - Enable IRQ for given queue vector * @vsi: the VSI that contains queue vector * @q_vector: queue vector + * @qid: queue index */ static void -ice_qvec_cfg_msix(struct ice_vsi *vsi, struct ice_q_vector *q_vector) +ice_qvec_cfg_msix(struct ice_vsi *vsi, struct ice_q_vector *q_vector, u16 qid) { u16 reg_idx = q_vector->reg_idx; struct ice_pf *pf = vsi->back; struct ice_hw *hw = &pf->hw; - struct ice_tx_ring *tx_ring; - struct ice_rx_ring *rx_ring; + int q, _qid = qid; ice_cfg_itr(hw, q_vector); - ice_for_each_tx_ring(tx_ring, q_vector->tx) - ice_cfg_txq_interrupt(vsi, tx_ring->reg_idx, reg_idx, - q_vector->tx.itr_idx); + for (q = 0; q < q_vector->num_ring_tx; q++) { + ice_cfg_txq_interrupt(vsi, _qid, reg_idx, q_vector->tx.itr_idx); + _qid++; + } - ice_for_each_rx_ring(rx_ring, q_vector->rx) - ice_cfg_rxq_interrupt(vsi, rx_ring->reg_idx, reg_idx, - q_vector->rx.itr_idx); + _qid = qid; + + for (q = 0; q < q_vector->num_ring_rx; q++) { + ice_cfg_rxq_interrupt(vsi, _qid, reg_idx, q_vector->rx.itr_idx); + _qid++; + } ice_flush(hw); } @@ -241,7 +245,7 @@ static int ice_qp_ena(struct ice_vsi *vsi, u16 q_idx) fail = err; q_vector = vsi->rx_rings[q_idx]->q_vector; - ice_qvec_cfg_msix(vsi, q_vector); + ice_qvec_cfg_msix(vsi, q_vector, q_idx); err = ice_vsi_ctrl_one_rx_ring(vsi, true, q_idx, true); if (!fail)