From patchwork Thu Aug 8 15:46:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13757884 Received: from mslow1.mail.gandi.net (mslow1.mail.gandi.net [217.70.178.240]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF1E71DA21; Thu, 8 Aug 2024 15:48:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.178.240 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723132133; cv=none; b=q1XRKZjFoAd4F93lW4XGXmQn90H1kXLekkL9eKGFrb03zmwquVdiKOVraXmU/bNyZFkfKiqq648noiQcm0+k7RboIzeC9XxuhhcnVA4VYyCFmjNfgsFmQYfzKBbtU38Shpkzc4mPmRLSN8ynf/mp02cI9tpcSdFSrP1nYrX8h0E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723132133; c=relaxed/simple; bh=nCUcFfl3ryWB3WoN057HGUpGm2xkWBAkIk1RT2o+sOg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FGLCLRZk7yWpsSnWI0ZHay3W3pP13/ArZyK5e+opG192/JsnS2zlVvyjQ0lzOAP8cPH/ZhCRknQWkRhOrQly9HyyqHr4RhRQ60rfEDfMBZR8g6Doj3uMk4Hf6fht1DRfW7rpm9qkYYwvSKI4xIxgftpgNyCDFacHZ94Eobfj9jY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=nsmnKCDq; arc=none smtp.client-ip=217.70.178.240 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="nsmnKCDq" Received: from relay7-d.mail.gandi.net (unknown [IPv6:2001:4b98:dc4:8::227]) by mslow1.mail.gandi.net (Postfix) with ESMTP id CF112C5A30; Thu, 8 Aug 2024 15:47:44 +0000 (UTC) Received: by mail.gandi.net (Postfix) with ESMTPA id 1B8AD2000A; Thu, 8 Aug 2024 15:47:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1723132057; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HX+nvwS6kB09lgTD73TSA639+9ALYJ6JqDo52csNvr8=; b=nsmnKCDqdPiN930xBc5+3PeN9jxuwits7o4xccLMr7oy0mtSnYd7XW7/sQEC73JjvsK8CT aY6uB2teBXg4TBPKZR8l/r1wP3VFwvYhbsC2AYHix+PEDfRO5ZzOQfn/0Mbd6069Dl78G0 R3w2ecLf3T8Nli6euDo47TxUv8sL+IzR0jlMaWUBOs2JtOf+jPaiMXcbHNG8rDUryVC/pa LKkM24BZIPhS8jbUQnBybnD9vlKIDZPLBw8Z/hT46qjYufxNH8yz/a5Eg/FxtWNGBlJ8vF 7rrnKsa1Ij3Kb/Y0L2Mt86Wv3NbW6ZGIXeUjUExtR1NUuaMZ6nf44WPXtM6C0Q== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH v5 4/8] reset: mchp: sparx5: Add MCHP_LAN966X_PCI dependency Date: Thu, 8 Aug 2024 17:46:53 +0200 Message-ID: <20240808154658.247873-5-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240808154658.247873-1-herve.codina@bootlin.com> References: <20240808154658.247873-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com The sparx5 reset controller depends on the SPARX5 architecture or the LAN966x SoC. This reset controller can be used by the LAN966x PCI device and so it needs to be available when the LAN966x PCI device is enabled. Signed-off-by: Herve Codina Reviewed-by: Steen Hegelund --- drivers/reset/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 67bce340a87e..5b5a4d99616e 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -134,7 +134,7 @@ config RESET_LPC18XX config RESET_MCHP_SPARX5 bool "Microchip Sparx5 reset driver" - depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST + depends on ARCH_SPARX5 || SOC_LAN966 || MCHP_LAN966X_PCI || COMPILE_TEST default y if SPARX5_SWITCH select MFD_SYSCON help