From patchwork Tue Sep 3 09:21:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Kleine-Budde X-Patchwork-Id: 13788354 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1AD6E1AD255 for ; Tue, 3 Sep 2024 09:22:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725355360; cv=none; b=i4MEwssz4fSAz8DKs9hFY+JLc2yrWkl8+yOzUjg+cTbNxuCU0A2W8FyJmTLe4ctdIhqy10fHr9jsxRFRjio9NPzW1uFrzcarrrpIPrZmuDE99tK/5nGHqboeldiWX3zGUGNEP4e5exEAKuWjCXSMKRYb/Z21Ip7UpuLpFnmu128= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725355360; c=relaxed/simple; bh=SBJQCTeSlQYQu2njLONa6Zs6CIoreB/ohxMsinKF8rs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ukGVdXGYw/PdQHQdmY5NSWHLzm9K+W12vsTYOD90bZp07KXFzwYuPn8wkiZa7c7hosLLOrewjJdaajzJucVSLRRKMHxC6NPe7fTpZqNRhlWQZlCIKqmHLQGlr0+ct2ElgV53w9IHtu/mA0znAQNfQi6uDSORQ5MTdnMaqvTipME= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1slPkA-0000ha-T1 for netdev@vger.kernel.org; Tue, 03 Sep 2024 11:22:34 +0200 Received: from [2a0a:edc0:0:b01:1d::7b] (helo=bjornoya.blackshift.org) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1slPk8-0059Nt-Np for netdev@vger.kernel.org; Tue, 03 Sep 2024 11:22:32 +0200 Received: from dspam.blackshift.org (localhost [127.0.0.1]) by bjornoya.blackshift.org (Postfix) with SMTP id 5552233109D for ; Tue, 03 Sep 2024 09:22:32 +0000 (UTC) Received: from hardanger.blackshift.org (unknown [172.20.34.65]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by bjornoya.blackshift.org (Postfix) with ESMTPS id E782F331020; Tue, 03 Sep 2024 09:22:26 +0000 (UTC) Received: from [172.20.34.65] (localhost [::1]) by hardanger.blackshift.org (OpenSMTPD) with ESMTP id 549b4e1c; Tue, 3 Sep 2024 09:22:26 +0000 (UTC) From: Marc Kleine-Budde Date: Tue, 03 Sep 2024 11:21:44 +0200 Subject: [PATCH can-next v4 02/20] arm64: dts: rockchip: add CAN-FD controller nodes to rk3568 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240903-rockchip-canfd-v4-2-1dc3f3f32856@pengutronix.de> References: <20240903-rockchip-canfd-v4-0-1dc3f3f32856@pengutronix.de> In-Reply-To: <20240903-rockchip-canfd-v4-0-1dc3f3f32856@pengutronix.de> To: kernel@pengutronix.de, Alibek Omarov , Vincent Mailhol , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Philipp Zabel , Elaine Zhang , David Jander Cc: Simon Horman , linux-can@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Marc Kleine-Budde , David Jander X-Mailer: b4 0.15-dev-99b12 X-Developer-Signature: v=1; a=openpgp-sha256; l=2054; i=mkl@pengutronix.de; h=from:subject:message-id; bh=NCZZ2jduquRgobxOQsZuTZ9M3tcNYg9AjFnUiZ6RQRE=; b=owEBbQGS/pANAwAKASg4oj56LbxvAcsmYgBm1tU2JO73A/3swZ+d0DogVrcbod6w+ozbdNWoK 1HbDpcTWmeJATMEAAEKAB0WIQRQQLqG4LYE3Sm8Pl8oOKI+ei28bwUCZtbVNgAKCRAoOKI+ei28 bz6JB/sGmoD+WYnjhZa/OrLp3eQyofDDQxpWWimX0/kjEwYZyzNRGMsvn9sTpZoA3m60QmLx4Uu Hy32sRpb1KnGBzkJ+UiOZBD6vYMoJDQqmDasiTPRhmzRwdcyR7A80SPeY6VDG3W2JSQ26SJbcXN VVyRizslmPRE9bvMmKiF7BJjdNXoz7dLsBlq6PDNLhtLphlXhW4aFV+XoH+fjU+vO9O+cm4/TPp VLP5eqYKNojPy4k9ZwZeA/1aOQkAvLDO2Hb8KNAy/ugspwILsXy2rwWzaUNQnJUD9Vf0qcfViWw 9n6dFY2JH01wAWuhgYAzlZp7jov3uPZeSbwI9kl4DjMkd0fg X-Developer-Key: i=mkl@pengutronix.de; a=openpgp; fpr=C1400BA0B3989E6FBC7D5B5C2B5EE211C58AEA54 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: mkl@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: netdev@vger.kernel.org From: David Jander Add nodes to the rk3568 devicetree to support the CAN-FD controllers. Signed-off-by: David Jander Tested-by: Alibek Omarov Signed-off-by: Marc Kleine-Budde --- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 39 ++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index f1be76a54ceb..70847556627d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -213,6 +213,45 @@ gmac0_mtl_tx_setup: tx-queues-config { }; }; + can0: can@fe570000 { + compatible = "rockchip,rk3568v2-canfd"; + reg = <0x0 0xfe570000 0x0 0x1000>; + interrupts = ; + clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>; + clock-names = "baud", "pclk"; + resets = <&cru SRST_CAN0>, <&cru SRST_P_CAN0>; + reset-names = "core", "apb"; + pinctrl-names = "default"; + pinctrl-0 = <&can0m0_pins>; + status = "disabled"; + }; + + can1: can@fe580000 { + compatible = "rockchip,rk3568v2-canfd"; + reg = <0x0 0xfe580000 0x0 0x1000>; + interrupts = ; + clocks = <&cru CLK_CAN1>, <&cru PCLK_CAN1>; + clock-names = "baud", "pclk"; + resets = <&cru SRST_CAN1>, <&cru SRST_P_CAN1>; + reset-names = "core", "apb"; + pinctrl-names = "default"; + pinctrl-0 = <&can1m0_pins>; + status = "disabled"; + }; + + can2: can@fe590000 { + compatible = "rockchip,rk3568v2-canfd"; + reg = <0x0 0xfe590000 0x0 0x1000>; + interrupts = ; + clocks = <&cru CLK_CAN2>, <&cru PCLK_CAN2>; + clock-names = "baud", "pclk"; + resets = <&cru SRST_CAN2>, <&cru SRST_P_CAN2>; + reset-names = "core", "apb"; + pinctrl-names = "default"; + pinctrl-0 = <&can2m0_pins>; + status = "disabled"; + }; + combphy0: phy@fe820000 { compatible = "rockchip,rk3568-naneng-combphy"; reg = <0x0 0xfe820000 0x0 0x100>;