From patchwork Tue Sep 3 10:47:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban Veerasooran X-Patchwork-Id: 13788502 X-Patchwork-Delegate: kuba@kernel.org Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C8621C62A6; Tue, 3 Sep 2024 10:49:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725360586; cv=none; b=nWLXRLO1G0xOE0K2KN7Ngr0YsGeS0MHb8hBCDCVDFlZ+ngfCsRVLH+mp4IxK2mUTQLuZK/MNIND3jZBUbw3jX2v+BTH2ilWWZvrXk48UwqKBBcj/W7koPlPbUM72YIBido6ziXS+y6W7+DOQNH8vEpgNeWo4ApnpmOunAMpr9R8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725360586; c=relaxed/simple; bh=+sI/jz+0k99u+/1sONE4Ydtk43cvotichTjvmCtOzAo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=W9sGIwqXq/waRkT5QOoOYIXCvP2X7zXW+qaB4+OLn8z+qRCNiU7WjdHWyc04PCxD/XOYgRcnwvD2gLvwgERssrEimdWgvryb+rCZJxai37iMgMJklWnLeYVM0KwDkpXvQGJH+cv8f+OfGFI1MQgoqIPTRjRp+aCymDioxWV9aXY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=EkeVanxI; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="EkeVanxI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725360584; x=1756896584; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+sI/jz+0k99u+/1sONE4Ydtk43cvotichTjvmCtOzAo=; b=EkeVanxIEJL/lO0yWjMTRQrsQJap6w6//2U79RDhnr95G6kc53Z5a6uk qaQNfAmrbJ7KBAxcUGwDZ+HdUPbRy57M8pmlZ9WffM43kl+fDOwipTkxm wsSYt3x+gZcYt9yP1/6rCO0+iPoDEtJcas3YPKqbRkBMdlD5BaY2EvG9o JxTXXb0BVKxNTBSfG/Ga/ULxwtzPoHZkQ64SMNymkSCxuybreCYXEBxPO qdksY0TBcfpsuzcNosZqw1WIkKKBEDKYMy0GQ6qFXQF6lWM5iEiikvCjN Ui1bdMjVnfsUwJOnkRJPOH7jNXNnhC9IW0RU20DRDcoiPadzwRVh9BPQn A==; X-CSE-ConnectionGUID: HEQGaLT3R9WXYpJSnDLQuw== X-CSE-MsgGUID: ksh8wsEUQsuoWL8nZbCsdQ== X-IronPort-AV: E=Sophos;i="6.10,198,1719903600"; d="scan'208";a="31159337" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 03 Sep 2024 03:49:42 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 3 Sep 2024 03:49:22 -0700 Received: from che-ll-i17164.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 3 Sep 2024 03:49:12 -0700 From: Parthiban Veerasooran To: , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , Parthiban Veerasooran Subject: [PATCH net-next v7 11/14] net: ethernet: oa_tc6: implement mac-phy interrupt Date: Tue, 3 Sep 2024 16:17:02 +0530 Message-ID: <20240903104705.378684-12-Parthiban.Veerasooran@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240903104705.378684-1-Parthiban.Veerasooran@microchip.com> References: <20240903104705.378684-1-Parthiban.Veerasooran@microchip.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The MAC-PHY interrupt is asserted when the following conditions are met. Receive chunks available - This interrupt is asserted when the previous data footer had no receive data chunks available and once the receive data chunks become available for reading. On reception of the first data header this interrupt will be deasserted. Transmit chunk credits available - This interrupt is asserted when the previous data footer indicated no transmit credits available and once the transmit credits become available for transmitting transmit data chunks. On reception of the first data header this interrupt will be deasserted. Extended status event - This interrupt is asserted when the previous data footer indicated no extended status and once the extended event become available. In this case the host should read status #0 register to know the corresponding error/event. On reception of the first data header this interrupt will be deasserted. Reviewed-by: Andrew Lunn Signed-off-by: Parthiban Veerasooran --- drivers/net/ethernet/oa_tc6.c | 52 ++++++++++++++++++++++++++++++++++- 1 file changed, 51 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/oa_tc6.c b/drivers/net/ethernet/oa_tc6.c index 72d95bad669f..d3510dc19273 100644 --- a/drivers/net/ethernet/oa_tc6.c +++ b/drivers/net/ethernet/oa_tc6.c @@ -126,6 +126,7 @@ struct oa_tc6 { u16 tx_credits; u8 rx_chunks_available; bool rx_buf_overflow; + bool int_flag; }; enum oa_tc6_header_type { @@ -1064,6 +1065,14 @@ static int oa_tc6_try_spi_transfer(struct oa_tc6 *tc6) spi_len = oa_tc6_prepare_spi_tx_buf_for_rx_chunks(tc6, spi_len); + if (tc6->int_flag) { + tc6->int_flag = false; + if (spi_len == 0) { + oa_tc6_add_empty_chunks_to_spi_buf(tc6, 1); + spi_len = OA_TC6_CHUNK_SIZE; + } + } + if (spi_len == 0) break; @@ -1098,8 +1107,11 @@ static int oa_tc6_spi_thread_handler(void *data) int ret; while (likely(!kthread_should_stop())) { - /* This kthread will be waken up if there is a tx skb */ + /* This kthread will be waken up if there is a tx skb or mac-phy + * interrupt to perform spi transfer with tx chunks. + */ wait_event_interruptible(tc6->spi_wq, tc6->waiting_tx_skb || + tc6->int_flag || kthread_should_stop()); if (kthread_should_stop()) @@ -1133,6 +1145,24 @@ static int oa_tc6_update_buffer_status_from_register(struct oa_tc6 *tc6) return 0; } +static irqreturn_t oa_tc6_macphy_isr(int irq, void *data) +{ + struct oa_tc6 *tc6 = data; + + /* MAC-PHY interrupt can occur for the following reasons. + * - availability of tx credits if it was 0 before and not reported in + * the previous rx footer. + * - availability of rx chunks if it was 0 before and not reported in + * the previous rx footer. + * - extended status event not reported in the previous rx footer. + */ + tc6->int_flag = true; + /* Wake spi kthread to perform spi transfer */ + wake_up_interruptible(&tc6->spi_wq); + + return IRQ_HANDLED; +} + /** * oa_tc6_start_xmit - function for sending the tx skb which consists ethernet * frame. @@ -1260,8 +1290,28 @@ struct oa_tc6 *oa_tc6_init(struct spi_device *spi, struct net_device *netdev) sched_set_fifo(tc6->spi_thread); + ret = devm_request_irq(&tc6->spi->dev, tc6->spi->irq, oa_tc6_macphy_isr, + IRQF_TRIGGER_FALLING, dev_name(&tc6->spi->dev), + tc6); + if (ret) { + dev_err(&tc6->spi->dev, "Failed to request macphy isr %d\n", + ret); + goto kthread_stop; + } + + /* oa_tc6_sw_reset_macphy() function resets and clears the MAC-PHY reset + * complete status. IRQ is also asserted on reset completion and it is + * remain asserted until MAC-PHY receives a data chunk. So performing an + * empty data chunk transmission will deassert the IRQ. Refer section + * 7.7 and 9.2.8.8 in the OPEN Alliance specification for more details. + */ + tc6->int_flag = true; + wake_up_interruptible(&tc6->spi_wq); + return tc6; +kthread_stop: + kthread_stop(tc6->spi_thread); phy_exit: oa_tc6_phy_exit(tc6); return NULL;