From patchwork Wed Sep 11 08:16:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: MD Danish Anwar X-Patchwork-Id: 13799858 X-Patchwork-Delegate: kuba@kernel.org Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 679D014EC56; Wed, 11 Sep 2024 08:16:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726042594; cv=none; b=HN2CeJfsA2dRFGTqf3+gN6yfQJXhXh8mt5ricFzjk8/8A7EJZqSlNiYPe1qJ2IhRuwatW2fbAVd1i89v1ZirbtU6s81D6WvL3rS83GiY5fJGIQkFNVY3abGxtOafBup6oaiLtm860YCLRPJFUflxEzZE1Od7kyad5r7o7k3qP64= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726042594; c=relaxed/simple; bh=goN8rRsJ8t196KTri2od+YZPS5NxKRZ9ryyDmOD39t4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=kYrNnKg5x0Zgh3rO9Ai9Ralos/5M1akO26A0noMM5nbfj8j+wkeIicBuI0FC1dRWuf72T3bCSR7EUwvbw8zaKL94S6/vyLv2H1G6WA5XDoc52mHUVFz8bV7WvM5HZjpsKUF4ePtGMMiK9rIUHHho7F5upCh8Q9uzbBwA3Zqw8E0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=beV/ebAV; arc=none smtp.client-ip=198.47.23.249 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="beV/ebAV" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 48B8GAN9030660; Wed, 11 Sep 2024 03:16:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1726042570; bh=qqgrhRTf+KyvANEAvpb1Sfr4VG+gT1238900G6lyK90=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=beV/ebAVrL2YqbccKJjQujfpIm4ZuuYXchv+FJjTH7QuBqqkI/YIB/p5PtveNxQS1 xGBvdvCQnmS46Mhwnm+TGCvb8WhVrFjc5OG4s536uybN3sKoF56SSwpH+O6rnaEWIC oKzECqN9pat8RWyaj2CBsYWWLgt9JaRdPspLe/lQ= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 48B8GAk5052798 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 11 Sep 2024 03:16:10 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 11 Sep 2024 03:16:09 -0500 Received: from fllvsmtp7.itg.ti.com (10.64.40.31) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 11 Sep 2024 03:16:09 -0500 Received: from lelv0854.itg.ti.com (lelv0854.itg.ti.com [10.181.64.140]) by fllvsmtp7.itg.ti.com (8.15.2/8.15.2) with ESMTP id 48B8G9L4066336; Wed, 11 Sep 2024 03:16:09 -0500 Received: from localhost (danish-tpc.dhcp.ti.com [10.24.69.25]) by lelv0854.itg.ti.com (8.14.7/8.14.7) with ESMTP id 48B8G8mI032127; Wed, 11 Sep 2024 03:16:09 -0500 From: MD Danish Anwar To: , , , , , , , , , , , , , , CC: , , , , Vignesh Raghavendra , Roger Quadros , Subject: [PATCH net-next v6 2/5] net: ti: icssg-prueth: Stop hardcoding def_inc Date: Wed, 11 Sep 2024 13:46:00 +0530 Message-ID: <20240911081603.2521729-3-danishanwar@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240911081603.2521729-1-danishanwar@ti.com> References: <20240911081603.2521729-1-danishanwar@ti.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Patchwork-Delegate: kuba@kernel.org The def_inc is stored in icss_iep structure. Currently default increment (ns per clock tick) is hardcoded to 4 (Clock frequency being 250 MHz). Change this to use the iep->def_inc variable as the iep structure is now accessible to the driver files. Reviewed-by: Roger Quadros Signed-off-by: MD Danish Anwar --- drivers/net/ethernet/ti/icssg/icssg_prueth.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/ti/icssg/icssg_prueth.c b/drivers/net/ethernet/ti/icssg/icssg_prueth.c index 6644203d6bb7..5343d8754edd 100644 --- a/drivers/net/ethernet/ti/icssg/icssg_prueth.c +++ b/drivers/net/ethernet/ti/icssg/icssg_prueth.c @@ -365,7 +365,8 @@ static void prueth_iep_settime(void *clockops_data, u64 ns) sc_desc.cyclecounter0_set = cyclecount & GENMASK(31, 0); sc_desc.cyclecounter1_set = (cyclecount & GENMASK(63, 32)) >> 32; sc_desc.iepcount_set = ns % cycletime; - sc_desc.CMP0_current = cycletime - 4; //Count from 0 to (cycle time)-4 + /* Count from 0 to (cycle time) - emac->iep->def_inc */ + sc_desc.CMP0_current = cycletime - emac->iep->def_inc; memcpy_toio(sc_descp, &sc_desc, sizeof(sc_desc));