From patchwork Mon Sep 30 12:15:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13816070 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 963B919882F; Mon, 30 Sep 2024 12:16:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698582; cv=none; b=cKuSDoQFqcJ2mZ+juoBrM0P6hhA5ERX4gLF/c9odl81HHJscGCi6RQNiVNjOoXghY89Ddy3JEIZWm+NqO/X2AVvOvr/kylPiKBugjA5f+qhkhr1iDNkBfr0W7eU+J4y+HwSrLKbETh5sK2QRMKHEsjr7RGb9bAwMUY9VOMxFq8A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698582; c=relaxed/simple; bh=ZsJFdgHp+HZP9DhJrj15mKunAjdGK+2li3ZVx1o7hH8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Uu2KsyMGKaIlj9L9aIQUHc/PFJvnf+eHMANsvTlqdd3eSadbIVF9MQ1p2Lek6E8mmQ/+KuiqW2q7urZWRXtXnejoxygTxD50nwELrquPh43v8r36ctrwJp/E0ZFSZ3NqMSUOXA1QQ6NITMkTVZ7Nfv7jnQJJe/fW1R5kQAGhRnU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=F+z2WJbD; arc=none smtp.client-ip=217.70.183.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="F+z2WJbD" Received: by mail.gandi.net (Postfix) with ESMTPA id 7B4CF1C0002; Mon, 30 Sep 2024 12:16:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1727698579; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7fgJbfC9lyOKcqApbOxdnR9Zy8/QdynHN0Bvf0ShEr4=; b=F+z2WJbDjw9D8UQs/DwL0c/gOqEM5Ms7PLZ2NvI12Gu9RWYHwc+GUwbC519/yzALAadZ4e zfdB+3gx6DaMyQ456Sxmswogt0VOll5PaBBQbMRJc8QqzQTOqtGzDP5doIn81AQ39AucOX FfiCaWq2uEGIFfu9usxrQu745ksalqZZcNGUw3Bux1C2sLHO1PTVg9fVug+VCqrUV4Ur8i Rrfw+IWcecSO7JZmTmpia1wfNu3uKArzm3tJ4tjiUcdFC+H3aJmlYr68cMABEp/ETmFU8m v7SL95Km1h9RTQka0u1XM1zkcJbccmQJUemh7D9TBxxRmcyYqUy93racIiXXIA== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH v6 6/7] reset: mchp: sparx5: Allow building as a module Date: Mon, 30 Sep 2024 14:15:46 +0200 Message-ID: <20240930121601.172216-7-herve.codina@bootlin.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20240930121601.172216-1-herve.codina@bootlin.com> References: <20240930121601.172216-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger This reset controller can be used by the LAN966x PCI device. The LAN966x PCI device driver can be built as a module and this reset controller driver has no reason to be a builtin driver in that case. Signed-off-by: Clément Léger Signed-off-by: Herve Codina Reviewed-by: Steen Hegelund --- drivers/reset/Kconfig | 2 +- drivers/reset/reset-microchip-sparx5.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 86a5504950cb..93cddbe8609b 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -146,7 +146,7 @@ config RESET_LPC18XX This enables the reset controller driver for NXP LPC18xx/43xx SoCs. config RESET_MCHP_SPARX5 - bool "Microchip Sparx5 reset driver" + tristate "Microchip Sparx5 reset driver" depends on ARCH_SPARX5 || SOC_LAN966 || MCHP_LAN966X_PCI || COMPILE_TEST default y if SPARX5_SWITCH select MFD_SYSCON diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 1c095fa41d69..8b931af67383 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -172,6 +172,7 @@ static const struct of_device_id mchp_sparx5_reset_of_match[] = { }, { } }; +MODULE_DEVICE_TABLE(of, mchp_sparx5_reset_of_match); static struct platform_driver mchp_sparx5_reset_driver = { .probe = mchp_sparx5_reset_probe, @@ -194,3 +195,4 @@ postcore_initcall(mchp_sparx5_reset_init); MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); MODULE_AUTHOR("Steen Hegelund "); +MODULE_LICENSE("GPL");