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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , , , Tariq Toukan Subject: [PATCH net-next 01/15] net/mlx5: Refactor QoS group scheduling element creation Date: Sun, 13 Oct 2024 09:45:26 +0300 Message-ID: <20241013064540.170722-2-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241013064540.170722-1-tariqt@nvidia.com> References: <20241013064540.170722-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7C:EE_|PH7PR12MB7331:EE_ X-MS-Office365-Filtering-Correlation-Id: c2772408-7330-4944-6e12-08dceb52c4ba X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: 6qL1UNI9q9dKXiFBZ1IWfci6aE82VB96lm1hYZhZQHIdLWyFmsRvJ6s1YEmgeUiMNN9nt2XLP/o54wMsK88ieTBs25CZxO224GUCpgVfVd4WmeIP6EUeibthMsEiolLzDIpaIKJH9nLmJ5p3G8ml04MXfsz2WcbCKl8HUkrrSjyxGsYIkV/6HYQ7qoDxr262Nu0scyXUSvhecwRUHwcvcP8Lr79Pb6kgqipFo51XDIWBlcSYOHoZ+09mrkfqv21D3JyOlEAB6aVEynzwp81A6lTYyHj61Jh805ODXkvRWX9Mzd3gD/QQcgvKBYd3B6VWq8URX246XF7/ldxmbrB+hyp/CeJw74GNN2IrcFs+jJ5rH85EZVTtC3BOuFZ7BW1erNJ8MzwJp9gD17PY4KDSspEucreqlXAEduA/KI3YokVUFzQCSzGob0RnVa1WS44sax5dLIius/7v4esXCeh4kjyZU8DtbECpeZZUI+X5ILsYD4ZuUwJuVzx+nL1GnS4mlDT9TG7YLK1Q7U3svkHoq5ReAs8KkgbVnrTNgQGGGCfMhq/aqdOS60X7kyVlStgaRXY5N3yB8qYBNnCbGoczZUrpeXmp0cVlzM9ikxN4uUvpvPWmWa2dLBP2Qax0sB0F4lFv3GTf4JUS3D+pAR/1ssCUTZ73k6/gwW86ZLYWZt/LQM8o3vDxgHlCWge2hW0MK9xGkBofMBk5xoKIwD7yycT5mI1FPglrGYjRo5cWmtdlHMTrKztdUD1ZQoVif+9/17NN8VlB7Kv5Ljg77cJCXDWnA0wMYV+m9tWBVLgAFyFoGeSCzvoD+9m0TEUOjyt0GCk/3PztxkU4WOpx8s0P8PXnyBvGi4LSjp9r7YVDY7EBqEUCKILem0i1zkqbuns+P/XgyFiw8aUcuX/iNtpHjT0RmMD3CFKG263uYxuekYOwTN0m3AddqttKMBz/j9/dROzGv/XYB0cQnfnSUn6nEZoqOlnBR2mIokb//Vwh9T9Ol8KSNd6H9QXWyXoZocmsxkXTmkiChkqQ6mgp0RBtbZ2tb1cbvvY/Mspo7+MxPsyMy7zHqpNSKYrR510ZY2yC3flUqEc3NHhQB+55L6oCP/pd+9KjyGoe3H8VNj20uNeealpFCcFZEeBgHPlcYbxSiySXXNY7hQMvyuU5lBi1NK83tjTcdfBYTsandDUkloYZkhMxDbF1FCfof5h+XiuJWmOrlgNbmYV20U8/qQVKfu8rRcOAKaII9ye3bXiGOByubnfZHKBW2F3EI8D3G75jaP6mCaaJMZLmteNOQpizDNZF0LuFyuyBE9QfIf9zDcBtU3A0Pdj+BEf4ETWYf9qK3oTXrnQiJmb1hrvht/rm8JJ7YypHBnCYI9ggSYnYJweE1fiCIqjh9DEnl10Rwi4x X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(376014)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2024 06:46:29.8759 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c2772408-7330-4944-6e12-08dceb52c4ba X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7C.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7331 X-Patchwork-Delegate: kuba@kernel.org From: Carolina Jubran Introduce `esw_qos_create_group_sched_elem` to handle the creation of group scheduling elements for E-Switch QoS, Transmit Scheduling Arbiter (TSAR). This reduces duplication and simplifies code for TSAR setup. Signed-off-by: Carolina Jubran Reviewed-by: Cosmin Ratiu Signed-off-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/esw/qos.c | 63 +++++++++---------- 1 file changed, 30 insertions(+), 33 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c index ee6f76a6f0b5..e357ccd7bfd3 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c @@ -371,6 +371,33 @@ static int esw_qos_set_group_max_rate(struct mlx5_esw_rate_group *group, return err; } +static int esw_qos_create_group_sched_elem(struct mlx5_core_dev *dev, u32 parent_element_id, + u32 *tsar_ix) +{ + u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {}; + void *attr; + + if (!mlx5_qos_element_type_supported(dev, + SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR, + SCHEDULING_HIERARCHY_E_SWITCH) || + !mlx5_qos_tsar_type_supported(dev, + TSAR_ELEMENT_TSAR_TYPE_DWRR, + SCHEDULING_HIERARCHY_E_SWITCH)) + return -EOPNOTSUPP; + + MLX5_SET(scheduling_context, tsar_ctx, element_type, + SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR); + MLX5_SET(scheduling_context, tsar_ctx, parent_element_id, + parent_element_id); + attr = MLX5_ADDR_OF(scheduling_context, tsar_ctx, element_attributes); + MLX5_SET(tsar_element, attr, tsar_type, TSAR_ELEMENT_TSAR_TYPE_DWRR); + + return mlx5_create_scheduling_element_cmd(dev, + SCHEDULING_HIERARCHY_E_SWITCH, + tsar_ctx, + tsar_ix); +} + static int esw_qos_vport_create_sched_element(struct mlx5_vport *vport, u32 max_rate, u32 bw_share) { @@ -496,21 +523,10 @@ static void __esw_qos_free_rate_group(struct mlx5_esw_rate_group *group) static struct mlx5_esw_rate_group * __esw_qos_create_rate_group(struct mlx5_eswitch *esw, struct netlink_ext_ack *extack) { - u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {}; struct mlx5_esw_rate_group *group; - int tsar_ix, err; - void *attr; + u32 tsar_ix, err; - MLX5_SET(scheduling_context, tsar_ctx, element_type, - SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR); - MLX5_SET(scheduling_context, tsar_ctx, parent_element_id, - esw->qos.root_tsar_ix); - attr = MLX5_ADDR_OF(scheduling_context, tsar_ctx, element_attributes); - MLX5_SET(tsar_element, attr, tsar_type, TSAR_ELEMENT_TSAR_TYPE_DWRR); - err = mlx5_create_scheduling_element_cmd(esw->dev, - SCHEDULING_HIERARCHY_E_SWITCH, - tsar_ctx, - &tsar_ix); + err = esw_qos_create_group_sched_elem(esw->dev, esw->qos.root_tsar_ix, &tsar_ix); if (err) { NL_SET_ERR_MSG_MOD(extack, "E-Switch create TSAR for group failed"); return ERR_PTR(err); @@ -591,32 +607,13 @@ static int __esw_qos_destroy_rate_group(struct mlx5_esw_rate_group *group, static int esw_qos_create(struct mlx5_eswitch *esw, struct netlink_ext_ack *extack) { - u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {}; struct mlx5_core_dev *dev = esw->dev; - void *attr; int err; if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling)) return -EOPNOTSUPP; - if (!mlx5_qos_element_type_supported(dev, - SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR, - SCHEDULING_HIERARCHY_E_SWITCH) || - !mlx5_qos_tsar_type_supported(dev, - TSAR_ELEMENT_TSAR_TYPE_DWRR, - SCHEDULING_HIERARCHY_E_SWITCH)) - return -EOPNOTSUPP; - - MLX5_SET(scheduling_context, tsar_ctx, element_type, - SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR); - - attr = MLX5_ADDR_OF(scheduling_context, tsar_ctx, element_attributes); - MLX5_SET(tsar_element, attr, tsar_type, TSAR_ELEMENT_TSAR_TYPE_DWRR); - - err = mlx5_create_scheduling_element_cmd(dev, - SCHEDULING_HIERARCHY_E_SWITCH, - tsar_ctx, - &esw->qos.root_tsar_ix); + err = esw_qos_create_group_sched_elem(esw->dev, 0, &esw->qos.root_tsar_ix); if (err) { esw_warn(dev, "E-Switch create root TSAR failed (%d)\n", err); return err;