From patchwork Mon Oct 14 12:46:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13834953 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F6DB1AB6D7; Mon, 14 Oct 2024 12:46:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.196 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728910021; cv=none; b=G6ot/VCO+6ZHgasnGEg0kf2Da3lFWrUSlULG9+UUaLLrMvs+UnoFPAGQ88jWKj6+RRZIK6CipKcXWHw465FztSZ2XTwLvuRw4bwOQ2VX7ZsHreausatkmPqsWwtI4Kcgm7vwiZ5TaSyZUSBoEHQjFgDWrwJHxP2C3pWHS2N3JWk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728910021; c=relaxed/simple; bh=GOWBT9h/3nXYuB76zNELwGyOd1CMTlMArCly7bDgMGw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pB6r8fjBG292clMYFUHSIv//J6KqilgAh9/c9Zxf8DfTbE3Vb5RGyFyMe39bssMDMI3cJDC0UACqQeUtfezZ2imz+HWjxdKysOcZUcZPoIacLlHWC/tl05twNObySNEl6wZrPtnWRwsV6/Kv58kQaSfH4bnEmxShi1HulGPoegs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Ggi5ua8f; arc=none smtp.client-ip=217.70.183.196 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Ggi5ua8f" Received: by mail.gandi.net (Postfix) with ESMTPA id F27B4E0014; Mon, 14 Oct 2024 12:46:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1728910017; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=E/wWYBtbuKHs8SB1t7+2xBc63x9VLolhP/aq3cfRg14=; b=Ggi5ua8fxz5lAs+BS4DLqkW9ayFAlmgdkBNI5S+3H5wbdFVWb7sgtiVKGIgiwnW+5MVgox jomNNvWQuGSdX8+TDmuxZTnFvRMrgMz8TaoxxTxB3+s9I5IPpZdiEExaGuCjD3qT0nSnyr yF3ZOt0hygWrVulVtIM9cCbcdHBSmZBZwM1Ynbg1K3g4z8QWO8JeO+DfvjsLi6cXyLLDs4 xHZzgIowkXkdl+nF+YBBkkjuCLv/mZau6viKra/dt1zRveml0U6kuDFo8TZMsCyKi46Od0 ECL56hdmQ4c0wclEYy6aKqYUkS96nnCr/ZYeGNohzO6N4lIOHONVl7Qt01A7OQ== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH v10 5/6] reset: mchp: sparx5: Allow building as a module Date: Mon, 14 Oct 2024 14:46:34 +0200 Message-ID: <20241014124636.24221-6-herve.codina@bootlin.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241014124636.24221-1-herve.codina@bootlin.com> References: <20241014124636.24221-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger This reset controller can be used by the LAN966x PCI device. The LAN966x PCI device driver can be built as a module and this reset controller driver has no reason to be a builtin driver in that case. Signed-off-by: Clément Léger Signed-off-by: Herve Codina Reviewed-by: Steen Hegelund Reviewed-by: Philipp Zabel --- drivers/reset/Kconfig | 2 +- drivers/reset/reset-microchip-sparx5.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 86a5504950cb..93cddbe8609b 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -146,7 +146,7 @@ config RESET_LPC18XX This enables the reset controller driver for NXP LPC18xx/43xx SoCs. config RESET_MCHP_SPARX5 - bool "Microchip Sparx5 reset driver" + tristate "Microchip Sparx5 reset driver" depends on ARCH_SPARX5 || SOC_LAN966 || MCHP_LAN966X_PCI || COMPILE_TEST default y if SPARX5_SWITCH select MFD_SYSCON diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 48a62d5da78d..c4cc0edbb250 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -191,6 +191,7 @@ static const struct of_device_id mchp_sparx5_reset_of_match[] = { }, { } }; +MODULE_DEVICE_TABLE(of, mchp_sparx5_reset_of_match); static struct platform_driver mchp_sparx5_reset_driver = { .probe = mchp_sparx5_reset_probe, @@ -213,3 +214,4 @@ postcore_initcall(mchp_sparx5_reset_init); MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); MODULE_AUTHOR("Steen Hegelund "); +MODULE_LICENSE("GPL");