Message ID | 20241029202349.69442-10-l.rubusch@gmail.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | Add Enclustra Arria10 and Cyclone5 SoMs | expand |
diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 5f4bed187..6a2ecc7ed 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -691,6 +691,7 @@ ocram: sram@ffe00000 { #address-cells = <1>; #size-cells = <1>; reg = <0xffe00000 0x40000>; + ranges; }; eccmgr: eccmgr {
Add 'ranges' to the SRAM node as it is a required property by the dtschema. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> --- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 1 + 1 file changed, 1 insertion(+)