Message ID | 20241029202349.69442-6-l.rubusch@gmail.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | Add Enclustra Arria10 and Cyclone5 SoMs | expand |
diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 90e4ea61d..7f7ac0dc1 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -88,7 +88,7 @@ fpga-region { fpga-mgr = <&fpga_mgr>; }; - clkmgr@ffd04000 { + clkmgr: clkmgr@ffd04000 { compatible = "altr,clk-mgr"; reg = <0xffd04000 0x1000>;
Devicetree setup expects a clock manager label to be around. In preparation of upcoming changes to allow for compatibility. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> --- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)