| Message ID | 20241029202349.69442-9-l.rubusch@gmail.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add Enclustra Arria10 and Cyclone5 SoMs | expand |
diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 65d04339f..5f4bed187 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -99,21 +99,25 @@ clocks { cb_intosc_hs_div2_clk: cb_intosc_hs_div2_clk { #clock-cells = <0>; compatible = "fixed-clock"; + clock-frequency = <0>; }; cb_intosc_ls_clk: cb_intosc_ls_clk { #clock-cells = <0>; compatible = "fixed-clock"; + clock-frequency = <0>; }; f2s_free_clk: f2s_free_clk { #clock-cells = <0>; compatible = "fixed-clock"; + clock-frequency = <0>; }; osc1: osc1 { #clock-cells = <0>; compatible = "fixed-clock"; + clock-frequency = <0>; }; main_pll: main_pll@40 {
Add 'clock-frequency' is a required property by dtschema. Initialization is open, similar to agilex devices. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> --- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 4 ++++ 1 file changed, 4 insertions(+)