Message ID | 20241107063637.2122726-2-leyfoon.tan@starfivetech.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 6d4a34fe429f64048f4a273a0b6b001c16613d8c |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | net: stmmac: dwmac4: Fixes issues in dwmac4 | expand |
On Thu, Nov 07, 2024 at 02:36:34PM +0800, Ley Foon Tan wrote: > RTC fields are located in bits [1:0]. Correct the _MASK and _SHIFT > macros to use the appropriate mask and shift. > > Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> Reviewed-by: Simon Horman <horms@kernel.org>
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h index 0c050324997a..184d41a306af 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h @@ -393,8 +393,8 @@ static inline u32 mtl_chanx_base_addr(const struct dwmac4_addrs *addrs, #define MTL_OP_MODE_EHFC BIT(7) -#define MTL_OP_MODE_RTC_MASK 0x18 -#define MTL_OP_MODE_RTC_SHIFT 3 +#define MTL_OP_MODE_RTC_MASK GENMASK(1, 0) +#define MTL_OP_MODE_RTC_SHIFT 0 #define MTL_OP_MODE_RTC_32 (1 << MTL_OP_MODE_RTC_SHIFT) #define MTL_OP_MODE_RTC_64 0
RTC fields are located in bits [1:0]. Correct the _MASK and _SHIFT macros to use the appropriate mask and shift. Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)