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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Dragos Tatulea , Tariq Toukan Subject: [PATCH net-next 09/12] net/mlx5e: SHAMPO, Fix page_index calculation inconsistency Date: Thu, 7 Nov 2024 21:43:54 +0200 Message-ID: <20241107194357.683732-10-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241107194357.683732-1-tariqt@nvidia.com> References: <20241107194357.683732-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E3:EE_|CH3PR12MB7667:EE_ X-MS-Office365-Filtering-Correlation-Id: bafeac22-b435-4b06-683a-08dcff64c769 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|1800799024|36860700013; X-Microsoft-Antispam-Message-Info: 1M/AHMwU79L7ROrGtc6rIiju+aW8yT8eWAWaXuI2UaNCCyFod3Yk93s3gSHwmCVH9VG6p910N/kwKKv/g529LusYtH/v6XunD1aT+RGemXRxi5RFMQXKXCYxyLIuyXUuM69KyXTQ5MIUzesCPJ7/m9JFv/XMMcbEJPvTpx6sp5lfOa+IcMSOCiKHyStEA+w8e5M/Sy8T/+3ampJMRBbXgHhPAty3bd8yWRsmguIN+6d0OynGkxY4Rvgz0jRKIWSWFV/roX5Ga4hDRZXR4LBW/oCJDeQqzixYABYk8prX75vcDW0YyIW/rhTrp4imLIwL3LzIMYKQ1vSkQmvzRRb220iI57gccfgjSIe50EjGei+thZ/hferFulqp2LfRBcbUhKEbhOHhT/m4cMcectqgGCv2jb/aktvG4unFKbvzTrepLAbPEfoSQJKaDXXaf/IdSBUvcmx+so6b1GWROTQCvD/Y3e9RLEFohLO//yRVE1z/iFH4GOOIyUQDCYuLucGt6ChEShNeft3vPloZUhzW0oj1YXC+4F71a75prgppo5+G/kSVyHPd+yAQ5M7i9eSZ1sc8SvDwPkWcekxSwpflOLV7/Paulg/7x3vnoZgnO7CQvAAu1Krdo/PkoDpyA3yfvm1rD29Rtwq5tLKgCJPwg0RLAdoK5PEE5A0A9E0ZNxp70O4Zk5FAkAsFVt1Hz+jJ9SbkwxH9SLHmIGyZBYevZucOnbZJZ5NKeIrLhxraLR3V73yxk4jG+RQ6aE6Xf4s9uh3I90L1+fTX8uVK/YzFU9g4FptYGWrgEjURBaAFpoTUAWAlCFENyTG9o6mqAzODqPLde4K3/+oAkpgbHwzAfw+hbhz5h5l0RkXnIyPh62VH3qp1EF4ZGyAghGcNfswLFIOEM0/mMFcIQ2lEN8PiC5BW372xh7jYTaXhmFOChSF6mlMy2pq8PeMtx/XbATAewQBeo1Sxn1qqenT9SRrtU9zQkMGD2WUII33es0WFe4AxEqSBdbx5ypP7zq2/Rl9IOOMAIi9F8iPFrQ2N+HPetqeCPiEpa4ggqj9hM9X45TGaNHx3Ti7F+78IiQDxHZj4jP53drkVB6MXVQ2tVN9ZTyh09JLvWsVHG+mFf9Nx302SK0dVYg3f014A7bxvATxErdUhPKiUlW5pMT3RhL9x1MBOq5e7NvacLOqjzvHmUFLJgtMk1U9Z2c3lvDt+F7pIEyczEkdTHbw0f11TBmwaD0Zvr/YEXrSxRlV0rwHyPMzp6cxyaZValQR9fpkdog92xNclPFEso/Ad65lms92nykb7ckeINWkXta0gNLUTOR9n7g3DoAnrSfOxrBeyeHTwdM2que+P9+ZWNxzW/LhBCbGCd5GCHaTN6e7Kqcl+Axyk0w0tefe/7zRDI1i59M/jspVRac9hR+stW5+3Cq0KOg== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(82310400026)(1800799024)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Nov 2024 19:45:48.6216 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bafeac22-b435-4b06-683a-08dcff64c769 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E3.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7667 X-Patchwork-Delegate: kuba@kernel.org From: Dragos Tatulea When calculating the index for the next frag page slot, the divisor is incorrect: it should be the number of pages per queue not the number of headers per queue. This is currently harmless because frag pages are not used directly, but they are intermediated through the info array. But it needs to be fixed as an upcoming patch will get rid of the info array. This patch introduces a new pages per queue variable and plugs it in the formula. Now that this variable exists, additional code can be simplified in the SHAMPO initialization code. Signed-off-by: Dragos Tatulea Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en.h | 1 + drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 8 +++----- drivers/net/ethernet/mellanox/mlx5/core/en_rx.c | 2 +- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index 4449a57ba5b2..b4abb094f01a 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -629,6 +629,7 @@ struct mlx5e_shampo_hd { u16 curr_page_index; u32 hd_per_wq; u16 hd_per_wqe; + u16 pages_per_wq; unsigned long *bitmap; u16 pi; u16 ci; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index 59d7a0e28f24..3ca1ef1f39a5 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -767,8 +767,6 @@ static int mlx5_rq_shampo_alloc(struct mlx5_core_dev *mdev, u32 *pool_size, int node) { - void *wqc = MLX5_ADDR_OF(rqc, rqp->rqc, wq); - int wq_size; int err; if (!test_bit(MLX5E_RQ_STATE_SHAMPO, &rq->state)) @@ -793,9 +791,9 @@ static int mlx5_rq_shampo_alloc(struct mlx5_core_dev *mdev, cpu_to_be32(rq->mpwqe.shampo->mkey); rq->mpwqe.shampo->hd_per_wqe = mlx5e_shampo_hd_per_wqe(mdev, params, rqp); - wq_size = BIT(MLX5_GET(wq, wqc, log_wq_sz)); - *pool_size += (rq->mpwqe.shampo->hd_per_wqe * wq_size) / - MLX5E_SHAMPO_WQ_HEADER_PER_PAGE; + rq->mpwqe.shampo->pages_per_wq = + rq->mpwqe.shampo->hd_per_wq / MLX5E_SHAMPO_WQ_HEADER_PER_PAGE; + *pool_size += rq->mpwqe.shampo->pages_per_wq; return 0; err_hw_gro_data: diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c index e044e5d11f05..76a975667c77 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c @@ -671,7 +671,7 @@ static int mlx5e_build_shampo_hd_umr(struct mlx5e_rq *rq, header_offset = (index & (MLX5E_SHAMPO_WQ_HEADER_PER_PAGE - 1)) << MLX5E_SHAMPO_LOG_MAX_HEADER_ENTRY_SIZE; if (!(header_offset & (PAGE_SIZE - 1))) { - page_index = (page_index + 1) & (shampo->hd_per_wq - 1); + page_index = (page_index + 1) & (shampo->pages_per_wq - 1); frag_page = &shampo->pages[page_index]; err = mlx5e_page_alloc_fragmented(rq, frag_page);