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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Carolina Jubran , Cosmin Ratiu , Tariq Toukan Subject: [PATCH net-next 06/12] net/mlx5: Integrate esw_qos_vport_enable logic into rate operations Date: Thu, 7 Nov 2024 21:43:51 +0200 Message-ID: <20241107194357.683732-7-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241107194357.683732-1-tariqt@nvidia.com> References: <20241107194357.683732-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099DE:EE_|MW4PR12MB6802:EE_ X-MS-Office365-Filtering-Correlation-Id: 60f5a85e-0f8e-4fe1-4499-08dcff64bf68 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: eKHU8FQ+2K1gUQrkEDBnkdn2EjvzSBlTwh1CkN8fzUgS3huQAfPk5nPiuEuDsSIEY6CN0cdWyDURX1PgTa/nIxwHk+rqn+ktLh8Tlw7rEg4ktER/p1zDoVWq5AIdFtsUDC7RegBQBCrXKxIse5MVKNGsVAjCX0uSXciOXkSPdjD52dquzoHwatY4WfLRnN7zCzCpBmf92beRG+qCEAOhC5s+GGYHCp4phBQB8VoSzMtu249gHPcMlpH+VBJT7kHoUPiyB2xTqmdHMaz8YzMcLi2t/Ok/OkqydWS581ycmbP0IGfCNyRNnoWeBwl62aiGcmT/2etyGjcK0M2G6u33mPRTNN3bDssX7k8nx07WUffAvPfW7dcY2P2e5T5EOMqnbKQCjPR9Dy3OHB9zEIXRgQjL1J4L/1m/v6vZw43tFhM1h6KQVEwBqK4SMOWq9KUlFIirT2zeEAzByrEoN6fOQzaFgoowTz43EIHPsFqAP9DkUZZKSKt+xCDDgoixEECszB5r7Q9fSn3FHM8q69P24EUWD9aMYLcq858ogi5fa87iK+y2/hSgUvmSVfMg9w2x9a8U/5cxFKpXVWhkOhNWvE8A9xB6RcGSSQLopeWjZtizQXlBz0dHKWCammr9gbXede04I59N4uBtcRp3ef8ck2pJyw5A27t/foJNc/06AP9RYlfrDwLBZaCAYN5GbhhVE4QotKB7ROfvtsDXtA0CQq6Kne1rkS8wIsawm9Zb2DuffFWX5CHLDQuoLQw+FXGUv7CBPaKDnpA5Xx3bFoDikJqQAurqLqQckaip50tQ08Y433AaRf3f5Exmy7MJHZFMChoIxf1a15wOm80AYNlBvobhZVtPY8QrIn3/6HlDcnYYnzShYyROz61H0lEqmoaaAmQe0wKU0T42kP7/8WSzOUWNjnCWmAvZyGnYcDfwUAdcfPYaYTlAh1e3D50N6KhKUl5P5QhhO++tq5PDcbdlBCKt+N29Cb8s2OCKIehat1z27Vi66BJw62IzRiEyLOXfTLIm+hpGx3cYje0KGfYnDkxleeQiiJ1ZazipH9JOsh+hqLtfKFbPftejctiGovatzchozYuVDm4QFwC1d+x0+XIopzfJAXz8Cm5XZwucaLranZ4gO7Th9x/qUgWMZEkJSvqDuAzitH9iHFaAdzsLu5lk4y3vTSXQQk5rISO2pXcTVg7eEGFOiGhdWD6FvzJWFMTrc3cVktoYOcKES+F0xJITxhWcLQAvtTBjcwbvnEmPTHHAD5QfmVcjysbyMuLUepB2YpPjQbV9+Z3/7XhzFEVWhYZtvpzMh3WM1CHiyOw9QVsJ6g6i+K9qHI/zdred1BjeNhaTlWjWg4PIPf/1Lfhszy3LUE3dEu2y/gARNapulXhFRZiWbc2ocqfR88/7BXczlmGhG7a9t/9Fxf96wg== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Nov 2024 19:45:35.1455 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 60f5a85e-0f8e-4fe1-4499-08dcff64bf68 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099DE.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6802 X-Patchwork-Delegate: kuba@kernel.org From: Carolina Jubran Fold the esw_qos_vport_enable function into operations for configuring maximum and minimum rates, simplifying QoS logic. This change consolidates enabling and updating the scheduling element configuration, streamlining how vport QoS is initialized and adjusted. Signed-off-by: Carolina Jubran Reviewed-by: Cosmin Ratiu Signed-off-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/esw/qos.c | 87 +++++++++---------- 1 file changed, 39 insertions(+), 48 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c index 155400d36a1e..35e493924c09 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c @@ -590,22 +590,21 @@ static void esw_qos_put(struct mlx5_eswitch *esw) esw_qos_destroy(esw); } -static int esw_qos_vport_enable(struct mlx5_vport *vport, u32 max_rate, u32 bw_share, - struct netlink_ext_ack *extack) +static int esw_qos_vport_enable(struct mlx5_vport *vport, struct mlx5_esw_sched_node *parent, + u32 max_rate, u32 bw_share, struct netlink_ext_ack *extack) { struct mlx5_eswitch *esw = vport->dev->priv.eswitch; struct mlx5_esw_sched_node *sched_node; int err; esw_assert_qos_lock_held(esw); - if (vport->qos.sched_node) - return 0; err = esw_qos_get(esw, extack); if (err) return err; - sched_node = __esw_qos_alloc_node(esw, 0, SCHED_NODE_TYPE_VPORT, esw->qos.node0); + parent = parent ?: esw->qos.node0; + sched_node = __esw_qos_alloc_node(parent->esw, 0, SCHED_NODE_TYPE_VPORT, parent); if (!sched_node) { err = -ENOMEM; goto err_alloc; @@ -657,21 +656,42 @@ void mlx5_esw_qos_vport_disable(struct mlx5_vport *vport) esw_qos_unlock(esw); } +static int mlx5_esw_qos_set_vport_max_rate(struct mlx5_vport *vport, u32 max_rate, + struct netlink_ext_ack *extack) +{ + struct mlx5_esw_sched_node *vport_node = vport->qos.sched_node; + + esw_assert_qos_lock_held(vport->dev->priv.eswitch); + + if (!vport_node) + return esw_qos_vport_enable(vport, NULL, max_rate, 0, extack); + else + return esw_qos_sched_elem_config(vport_node, max_rate, vport_node->bw_share, + extack); +} + +static int mlx5_esw_qos_set_vport_min_rate(struct mlx5_vport *vport, u32 min_rate, + struct netlink_ext_ack *extack) +{ + struct mlx5_esw_sched_node *vport_node = vport->qos.sched_node; + + esw_assert_qos_lock_held(vport->dev->priv.eswitch); + + if (!vport_node) + return esw_qos_vport_enable(vport, NULL, 0, min_rate, extack); + else + return esw_qos_set_node_min_rate(vport_node, min_rate, extack); +} + int mlx5_esw_qos_set_vport_rate(struct mlx5_vport *vport, u32 max_rate, u32 min_rate) { struct mlx5_eswitch *esw = vport->dev->priv.eswitch; int err; esw_qos_lock(esw); - err = esw_qos_vport_enable(vport, 0, 0, NULL); - if (err) - goto unlock; - - err = esw_qos_set_node_min_rate(vport->qos.sched_node, min_rate, NULL); + err = mlx5_esw_qos_set_vport_min_rate(vport, min_rate, NULL); if (!err) - err = esw_qos_sched_elem_config(vport->qos.sched_node, max_rate, - vport->qos.sched_node->bw_share, NULL); -unlock: + err = mlx5_esw_qos_set_vport_max_rate(vport, max_rate, NULL); esw_qos_unlock(esw); return err; } @@ -757,10 +777,8 @@ static int mlx5_esw_qos_link_speed_verify(struct mlx5_core_dev *mdev, int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32 rate_mbps) { - u32 ctx[MLX5_ST_SZ_DW(scheduling_context)] = {}; struct mlx5_vport *vport; u32 link_speed_max; - u32 bitmask; int err; vport = mlx5_eswitch_get_vport(esw, vport_num); @@ -779,20 +797,7 @@ int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32 } esw_qos_lock(esw); - if (!vport->qos.sched_node) { - /* Eswitch QoS wasn't enabled yet. Enable it and vport QoS. */ - err = esw_qos_vport_enable(vport, rate_mbps, 0, NULL); - } else { - struct mlx5_core_dev *dev = vport->qos.sched_node->parent->esw->dev; - - MLX5_SET(scheduling_context, ctx, max_average_bw, rate_mbps); - bitmask = MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW; - err = mlx5_modify_scheduling_element_cmd(dev, - SCHEDULING_HIERARCHY_E_SWITCH, - ctx, - vport->qos.sched_node->ix, - bitmask); - } + err = mlx5_esw_qos_set_vport_max_rate(vport, rate_mbps, NULL); esw_qos_unlock(esw); return err; @@ -863,12 +868,7 @@ int mlx5_esw_devlink_rate_leaf_tx_share_set(struct devlink_rate *rate_leaf, void return err; esw_qos_lock(esw); - err = esw_qos_vport_enable(vport, 0, 0, extack); - if (err) - goto unlock; - - err = esw_qos_set_node_min_rate(vport->qos.sched_node, tx_share, extack); -unlock: + err = mlx5_esw_qos_set_vport_min_rate(vport, tx_share, extack); esw_qos_unlock(esw); return err; } @@ -889,13 +889,7 @@ int mlx5_esw_devlink_rate_leaf_tx_max_set(struct devlink_rate *rate_leaf, void * return err; esw_qos_lock(esw); - err = esw_qos_vport_enable(vport, 0, 0, extack); - if (err) - goto unlock; - - err = esw_qos_sched_elem_config(vport->qos.sched_node, tx_max, - vport->qos.sched_node->bw_share, extack); -unlock: + err = mlx5_esw_qos_set_vport_max_rate(vport, tx_max, extack); esw_qos_unlock(esw); return err; } @@ -991,13 +985,10 @@ int mlx5_esw_qos_vport_update_node(struct mlx5_vport *vport, } esw_qos_lock(esw); - if (!vport->qos.sched_node && !node) - goto unlock; - - err = esw_qos_vport_enable(vport, 0, 0, extack); - if (!err) + if (!vport->qos.sched_node && node) + err = esw_qos_vport_enable(vport, node, 0, 0, extack); + else if (vport->qos.sched_node) err = esw_qos_vport_update_node(vport, node, extack); -unlock: esw_qos_unlock(esw); return err; }