From patchwork Wed Nov 13 21:11:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Machon X-Patchwork-Id: 13874292 X-Patchwork-Delegate: kuba@kernel.org Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 406B420822D; Wed, 13 Nov 2024 21:12:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731532346; cv=none; b=IAzVTVjHqSc1kMaOpM0Hc0AkPqPFePrMYqBlYC5Ag1IKY+D0QV0dR3COs0gWVxb3VyPK7040lADnVIysgWctivJq0l6ZsYIG9mmhaWFudrTkY6ZXsQAXBPJT1ApPioFl/PxjAyfpzhs4ivhV/MQHlppKta1o15sIQOW5Nkym5P4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731532346; c=relaxed/simple; bh=svbx3/Il10T0pAS9HC3iTDtx7A8zQjEjVIdly0SxNoc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=Y47Jq2xsh6Y9RtrfG2IaXAAez9jHrtj9Tum5L5ybbjgIUTSV/SuCeS2UMgWW+sgjy27tc22BW0bIcpe0vn1ow8t+hNNVAM2UUR/AvsuIsIQcq7P+K76x73H0sv7P7+WMvugqwKj9HB5YawMZhvGIHxjrHaJ5lovBadquiHx1zOU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=fQNLqcBJ; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="fQNLqcBJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1731532345; x=1763068345; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=svbx3/Il10T0pAS9HC3iTDtx7A8zQjEjVIdly0SxNoc=; b=fQNLqcBJjsxFNLVLv3t9AlMBOKNcOtXz8nb7vAoMREo9lDr8w3zLc/td 2cBwcWqJqjC1JXnadygifPZw6xgU+0fsed+/NqjoYgUfhfMAmj4NPXjHm +0A2Urmt1OiEKdVUawJFNhAQnW5Mh601A9Ar9+eZPpRoUlpls7ELCBU3L cVxmhs6VVt6WWPFdYXtkM4KK0J4u+l32Mw/Zgeb0wxbtCrIVdt2kPHhiU XJsYHKELs5N90D4VMBdTltbYZ9AUZHsAF80lT30S1A9V10zzWPBUXH6qt Q89o6FP9jn5oKvyIO60fjRg+HQ32t4PRblTM/OYXaiKL7gnIur7IAfDWN w==; X-CSE-ConnectionGUID: F8Mv1SaFTZWcTt5A65WwiA== X-CSE-MsgGUID: +FM6cmYhQgS3ssI4f5iwQQ== X-IronPort-AV: E=Sophos;i="6.12,152,1728975600"; d="scan'208";a="34014107" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 13 Nov 2024 14:12:24 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Wed, 13 Nov 2024 14:11:44 -0700 Received: from DEN-DL-M70577.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Wed, 13 Nov 2024 14:11:41 -0700 From: Daniel Machon Date: Wed, 13 Nov 2024 22:11:11 +0100 Subject: [PATCH net-next v2 3/8] net: sparx5: use is_port_rgmii() throughout Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20241113-sparx5-lan969x-switch-driver-4-v2-3-0db98ac096d1@microchip.com> References: <20241113-sparx5-lan969x-switch-driver-4-v2-0-0db98ac096d1@microchip.com> In-Reply-To: <20241113-sparx5-lan969x-switch-driver-4-v2-0-0db98ac096d1@microchip.com> To: , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , "Lars Povlsen" , Steen Hegelund , Horatiu Vultur , Russell King , , , , CC: , , , X-Mailer: b4 0.14-dev X-Patchwork-Delegate: kuba@kernel.org Now that we can check if a given port is an RGMII port, use it in the following cases: - To set RGMII PHY modes for RGMII port devices. - To avoid checking for a SerDes node in the devicetree, when the port is an RGMII port. - To bail out of sparx5_port_init() when the common configuration is done. Reviewed-by: Steen Hegelund Reviewed-by: Horatiu Vultur Signed-off-by: Daniel Machon --- .../net/ethernet/microchip/sparx5/sparx5_main.c | 28 +++++++++++++++------- .../net/ethernet/microchip/sparx5/sparx5_port.c | 3 +++ 2 files changed, 23 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c index ad8c048179c7..2967dd1952e9 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c @@ -313,10 +313,13 @@ static int sparx5_create_port(struct sparx5 *sparx5, struct initial_port_config *config) { struct sparx5_port *spx5_port; + const struct sparx5_ops *ops; struct net_device *ndev; struct phylink *phylink; int err; + ops = sparx5->data->ops; + ndev = sparx5_create_netdev(sparx5, config->portno); if (IS_ERR(ndev)) { dev_err(sparx5->dev, "Could not create net device: %02u\n", @@ -357,6 +360,9 @@ static int sparx5_create_port(struct sparx5 *sparx5, MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD | MAC_5000FD | MAC_10000FD | MAC_25000FD; + if (ops->is_port_rgmii(spx5_port->portno)) + phy_interface_set_rgmii(spx5_port->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_SGMII, spx5_port->phylink_config.supported_interfaces); __set_bit(PHY_INTERFACE_MODE_QSGMII, @@ -831,6 +837,7 @@ static int mchp_sparx5_probe(struct platform_device *pdev) struct initial_port_config *configs, *config; struct device_node *np = pdev->dev.of_node; struct device_node *ports, *portnp; + const struct sparx5_ops *ops; struct reset_control *reset; struct sparx5 *sparx5; int idx = 0, err = 0; @@ -852,6 +859,7 @@ static int mchp_sparx5_probe(struct platform_device *pdev) return -EINVAL; regs = sparx5->data->regs; + ops = sparx5->data->ops; /* Do switch core reset if available */ reset = devm_reset_control_get_optional_shared(&pdev->dev, "switch"); @@ -881,7 +889,7 @@ static int mchp_sparx5_probe(struct platform_device *pdev) for_each_available_child_of_node(ports, portnp) { struct sparx5_port_config *conf; - struct phy *serdes; + struct phy *serdes = NULL; u32 portno; err = of_property_read_u32(portnp, "reg", &portno); @@ -911,13 +919,17 @@ static int mchp_sparx5_probe(struct platform_device *pdev) conf->sd_sgpio = ~0; else sparx5->sd_sgpio_remapping = true; - serdes = devm_of_phy_get(sparx5->dev, portnp, NULL); - if (IS_ERR(serdes)) { - err = dev_err_probe(sparx5->dev, PTR_ERR(serdes), - "port %u: missing serdes\n", - portno); - of_node_put(portnp); - goto cleanup_config; + /* There is no SerDes node for RGMII ports. */ + if (!ops->is_port_rgmii(portno)) { + serdes = devm_of_phy_get(sparx5->dev, portnp, NULL); + if (IS_ERR(serdes)) { + err = dev_err_probe(sparx5->dev, + PTR_ERR(serdes), + "port %u: missing serdes\n", + portno); + of_node_put(portnp); + goto cleanup_config; + } } config->portno = portno; config->node = portnp; diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c index c929b2a63386..8f4f19a2bd65 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c @@ -1090,6 +1090,9 @@ int sparx5_port_init(struct sparx5 *sparx5, ANA_CL_FILTER_CTRL_FILTER_SMAC_MC_DIS, sparx5, ANA_CL_FILTER_CTRL(port->portno)); + if (ops->is_port_rgmii(port->portno)) + return 0; /* RGMII device - nothing more to configure */ + /* Configure MAC vlan awareness */ err = sparx5_port_max_tags_set(sparx5, port); if (err)