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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Jiri Pirko , Carolina Jubran , Cosmin Ratiu , Tariq Toukan Subject: [PATCH net-next V2 4/8] net/mlx5: Add no-op implementation for setting tc-bw on rate objects Date: Fri, 15 Nov 2024 00:09:33 +0200 Message-ID: <20241114220937.719507-5-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241114220937.719507-1-tariqt@nvidia.com> References: <20241114220937.719507-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC0:EE_|DS7PR12MB5912:EE_ X-MS-Office365-Filtering-Correlation-Id: 52a1f85a-b0ef-49c4-39f9-08dd04f93a6b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: csiAcWwf8H5ktlrnefhQXXykYs04S5scFXOOR/jACCkCTudzEDgGnsjIInkBo4R0zeNlQ/NpYniNjq0a//gjH07+6g00tsFnVSdL2jNKj43Jc+1Lo+TxIske6TrzxrXyblsBUnDK4du/ZleC1rJhd9odmVB8M9jRB7CUJ+/EhYzwAWksRs+Is1thcd/teEJOsi9gPaikHFkb91LF+9HgaOvNfmQXuqypRP7lMD+catQH43sHV8HCtI054kiub1Xt4Xvk032UCiiSvvGWlIbGuaoqJazzoGYA+FPPDSrupTIn4ivDJI/WkEdjCzC4KDFsaw4clh6PnIPRbvE3wGgJ2vg6BlRvZo+vNYaXKoyIAKR5mmtHpn/XAlvDvdQsEffc09q1e6Bq9syCkIG5PYv/5908UEX7M5G15wJSZfeSQIcpzNIU/xrt6SnnedmSilDX8v5UaiA9/lm1AetcL3C/OynljAI/aEf1vl4VPblJ3QtvXEVM22Oxo+WDcQsmZCl0qIvimXl7ZVePlCDU8RP68+zSq50BginwrL7DMTb0Mkxtpv88Fc9bPQA0b5qnS6wNX/KEGH00arSLUvthTcFpjlq3VbyJUDRXKGDTSsp7HB3amsqioVhuv5xnnm7wWkxE8XleIGC8+6zEBeWmn+7z8duDcz0Z5r6BNZ9ZPzZ1T6LvhddFtonqOxfCaZrhBEVChvy+DQMy9uPxerUXcxHxsRSCZrH2yZAnQvgqArYBKZ7Dp/Z6uxCkwX+2/jnZRg/JHULMVlXx3ov1AwjQhOPAIoRDvJcajg0nUQedMS1N0DIBEXbiyGr6Od5YcYpSjSIQiehoWAnwr05AQMP3IQkK5P6srVI0N+tcdgQNdIZ5/WyqNqxKUAkvC3eN15CRSSQ4Rga6dT/1FXgmPTn4gHyZs7/jTe85QIIqx93IDLXpjBsk03z7ZfXcSp/rrW89dzH0C49WZP+Jg1lg2FAZ3dukIhPezN+cANVaTVOvKqPLsUUDlxwpr5waZVB9nbsuSknvlLRFoU/3M6be9RMg1NmZtF2NUX5l78c7bkoc+KJ8Nhos3G80DFvAfpZrq0T1NPirljQenSBhpPfa1afJ5TWNvF0wLnTwx/1xTkwj419dSxmBf6faNjORJK15iQNHAansDWKq5Ns7vKNvaIe+b44fEXE/sVZlxL3x+Bc6pIbRpTWq8Ml8xK0hZFzWMiVGRM1pFiBcRCFEv+3BMK9Vu9vi9uGteuShJaHF5YV6798IqLYFI5cgafbp8npKDtU/Uo327coB/ZOXNOCXjFZ9atWaGt0dTXcsL+y1uFAOTGMvlvAL8z9i2tkqk7OcUidTEdyLiJVv44pqbuckOPkHnBXyddzAIC/uC5NFGT8Z0Ki3zLoJRmWDqpYV02E0a2cUGdjeUJd6eO23A+Y8iRpRFiX9rQ== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Nov 2024 22:11:02.8701 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 52a1f85a-b0ef-49c4-39f9-08dd04f93a6b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC0.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5912 X-Patchwork-Delegate: kuba@kernel.org From: Carolina Jubran Introduce `mlx5_esw_devlink_rate_node_tc_bw_set()` and `mlx5_esw_devlink_rate_leaf_tc_bw_set()` with no-op logic. Future patches will add support for setting traffic class bandwidth on rate objects. Signed-off-by: Carolina Jubran Reviewed-by: Cosmin Ratiu Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/devlink.c | 2 ++ drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c | 14 ++++++++++++++ drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h | 4 ++++ 3 files changed, 20 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c index 98d4306929f3..728d5c06d612 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c @@ -320,6 +320,8 @@ static const struct devlink_ops mlx5_devlink_ops = { .eswitch_encap_mode_get = mlx5_devlink_eswitch_encap_mode_get, .rate_leaf_tx_share_set = mlx5_esw_devlink_rate_leaf_tx_share_set, .rate_leaf_tx_max_set = mlx5_esw_devlink_rate_leaf_tx_max_set, + .rate_leaf_tc_bw_set = mlx5_esw_devlink_rate_leaf_tc_bw_set, + .rate_node_tc_bw_set = mlx5_esw_devlink_rate_node_tc_bw_set, .rate_node_tx_share_set = mlx5_esw_devlink_rate_node_tx_share_set, .rate_node_tx_max_set = mlx5_esw_devlink_rate_node_tx_max_set, .rate_node_new = mlx5_esw_devlink_rate_node_new, diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c index 8b7c843446e1..db112a87b7ee 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c @@ -882,6 +882,20 @@ int mlx5_esw_devlink_rate_leaf_tx_max_set(struct devlink_rate *rate_leaf, void * return err; } +int mlx5_esw_devlink_rate_leaf_tc_bw_set(struct devlink_rate *rate_leaf, void *priv, + u32 *tc_bw, struct netlink_ext_ack *extack) +{ + NL_SET_ERR_MSG_MOD(extack, "TC bandwidth shares are not supported on leafs"); + return -EOPNOTSUPP; +} + +int mlx5_esw_devlink_rate_node_tc_bw_set(struct devlink_rate *rate_node, void *priv, + u32 *tc_bw, struct netlink_ext_ack *extack) +{ + NL_SET_ERR_MSG_MOD(extack, "TC bandwidth shares are not supported on nodes"); + return -EOPNOTSUPP; +} + int mlx5_esw_devlink_rate_node_tx_share_set(struct devlink_rate *rate_node, void *priv, u64 tx_share, struct netlink_ext_ack *extack) { diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h index 6eb8f6a648c8..0239f10f95e7 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h @@ -21,6 +21,10 @@ int mlx5_esw_devlink_rate_leaf_tx_share_set(struct devlink_rate *rate_leaf, void u64 tx_share, struct netlink_ext_ack *extack); int mlx5_esw_devlink_rate_leaf_tx_max_set(struct devlink_rate *rate_leaf, void *priv, u64 tx_max, struct netlink_ext_ack *extack); +int mlx5_esw_devlink_rate_leaf_tc_bw_set(struct devlink_rate *rate_node, void *priv, + u32 *tc_bw, struct netlink_ext_ack *extack); +int mlx5_esw_devlink_rate_node_tc_bw_set(struct devlink_rate *rate_node, void *priv, + u32 *tc_bw, struct netlink_ext_ack *extack); int mlx5_esw_devlink_rate_node_tx_share_set(struct devlink_rate *rate_node, void *priv, u64 tx_share, struct netlink_ext_ack *extack); int mlx5_esw_devlink_rate_node_tx_max_set(struct devlink_rate *rate_node, void *priv,