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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Jiri Pirko , Carolina Jubran , Cosmin Ratiu , Tariq Toukan Subject: [PATCH net-next V3 4/8] net/mlx5: Add no-op implementation for setting tc-bw on rate objects Date: Sun, 17 Nov 2024 22:50:41 +0200 Message-ID: <20241117205046.736499-5-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241117205046.736499-1-tariqt@nvidia.com> References: <20241117205046.736499-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF0000000C:EE_|SA0PR12MB7463:EE_ X-MS-Office365-Filtering-Correlation-Id: 41967d7b-b650-4220-36e7-08dd0749af06 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: Z4grtq95wbVOmlpV5Mj+xTkwCARwmuutiaoLyPgRHbRlGwkkPqvVVTN6faRI1x5bjW7uiyKG3WCRRGV/51++39rhbhI/huwUTgJiiWNlz7r1jxDcpgf4XFzrVYl+oacJ5z+YCJq1CVggCpHrSevp5KNtHCIPdWq9G3Yicg/o1r6rTXDJIcwiD19WpD9J6Srh9dkSkBnrqo3Ysb6nFsMpfGC/WNGpOrV589VBFeItfCuGMCMkcms2MuAD5Vt1DO0tikJ4u+fm04E3kC+lwp471rrzqSgZKYI3vlYvoUtZbS4K9U8qMJXoAEKZrFyhioeUS5bmIT1Bn1+Jel5qF617vjO/cdHDqS1geLTkj+hlMvSuB6M3I2sC+ZzcB+qxosWP7hIAqUBvF9u59mqun8oJTRXPEvpxB+0B5f9twh58z31Kpa2RwsJ+gAd4f/KVjKBVVAXOQafnxd5EV8xuinkQrwXxdIiX2jRD3XGPwKKPUqdRjk1xznUUs5l4Iy5o9XyF94IcweEnmjkspk/Ito04q2ORZxJ8bNYY6my530KdkI+SHyf+mgWlnYHLAzqMfqZ8ZaUJz018aTIOrEpGP9Fur0hg7qy7wZ1EitzF9ZHQGF8Ado1nOpYvoVHhftZFyLKnwXM3lkl+u20h2aQqLMONe3P1CNRs5HFqDiDLY7pRIs7oB84DI1cJiZTYZieP6FtC4Kr31ts5LL0Wl8z1YMROMDaI9sRanU4+vsCTmw0ZlAZMXXIinQk1DtFCvmSZxmm07u0ctatt/eiEpjkLVNvCZ9d7O5aXK1fW4Cv7TncpySfB1HURPsgJsfAUnqFSgB2pNoZFUmx/TMIoU8CFnoz7m05A9waM9ZfxKWCngEMvYWQGtW4gT5g36xjoJWR/pTFnOyjhEFmztDHJOqyHu4p534JenRqSYRi35Lpd6yh7EFgazqpI7t1OnOxRRmmEcKyi0wtk11cvBS/hmyTDqHuf2zhgnqN0r9+vVpapCcucAkbdSmkruxtDgYdW554wh1r+tu4XknqhPnp0c8LVZInQE8S1BwtZq7ljbVUYxin0n070b0ICg+v6LpYxGRbfgCnablznqdUI2gjaQdhjHVsbv/Z8icbVcveKVq/Xub3dtE1fdW17zBxswwBKxVWUwcdiRM2c79ySG1wZOSm1Rf/UiN2wmlL1j0s2Z1IsFQwyBF4/OYIOZT7DWO+uLiq7gjzXcICdpD63XNBhzGuCR5xV/KW2mjCdhQS0abJJbzZNIYZUScz58GKJugeC33MI4PNGH1HDVBh0ZgQVmkGYi0iUHbpGH6CzblNOYBIcnaqciCMGHuhzyIbDR0oF4/llgvzGcure55IOLusReKG3/J3CzXnCSI90SqKy9JTGx9+FTJ/9oind/dNA2AEqhr6ERabaG7LgDLI728LdJLXBUAgicg== X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2024 20:52:00.5186 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 41967d7b-b650-4220-36e7-08dd0749af06 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000C.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB7463 X-Patchwork-Delegate: kuba@kernel.org From: Carolina Jubran Introduce `mlx5_esw_devlink_rate_node_tc_bw_set()` and `mlx5_esw_devlink_rate_leaf_tc_bw_set()` with no-op logic. Future patches will add support for setting traffic class bandwidth on rate objects. Signed-off-by: Carolina Jubran Reviewed-by: Cosmin Ratiu Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/devlink.c | 2 ++ drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c | 14 ++++++++++++++ drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h | 4 ++++ 3 files changed, 20 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c index 98d4306929f3..728d5c06d612 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c @@ -320,6 +320,8 @@ static const struct devlink_ops mlx5_devlink_ops = { .eswitch_encap_mode_get = mlx5_devlink_eswitch_encap_mode_get, .rate_leaf_tx_share_set = mlx5_esw_devlink_rate_leaf_tx_share_set, .rate_leaf_tx_max_set = mlx5_esw_devlink_rate_leaf_tx_max_set, + .rate_leaf_tc_bw_set = mlx5_esw_devlink_rate_leaf_tc_bw_set, + .rate_node_tc_bw_set = mlx5_esw_devlink_rate_node_tc_bw_set, .rate_node_tx_share_set = mlx5_esw_devlink_rate_node_tx_share_set, .rate_node_tx_max_set = mlx5_esw_devlink_rate_node_tx_max_set, .rate_node_new = mlx5_esw_devlink_rate_node_new, diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c index 8b7c843446e1..db112a87b7ee 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c @@ -882,6 +882,20 @@ int mlx5_esw_devlink_rate_leaf_tx_max_set(struct devlink_rate *rate_leaf, void * return err; } +int mlx5_esw_devlink_rate_leaf_tc_bw_set(struct devlink_rate *rate_leaf, void *priv, + u32 *tc_bw, struct netlink_ext_ack *extack) +{ + NL_SET_ERR_MSG_MOD(extack, "TC bandwidth shares are not supported on leafs"); + return -EOPNOTSUPP; +} + +int mlx5_esw_devlink_rate_node_tc_bw_set(struct devlink_rate *rate_node, void *priv, + u32 *tc_bw, struct netlink_ext_ack *extack) +{ + NL_SET_ERR_MSG_MOD(extack, "TC bandwidth shares are not supported on nodes"); + return -EOPNOTSUPP; +} + int mlx5_esw_devlink_rate_node_tx_share_set(struct devlink_rate *rate_node, void *priv, u64 tx_share, struct netlink_ext_ack *extack) { diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h index 6eb8f6a648c8..0239f10f95e7 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h @@ -21,6 +21,10 @@ int mlx5_esw_devlink_rate_leaf_tx_share_set(struct devlink_rate *rate_leaf, void u64 tx_share, struct netlink_ext_ack *extack); int mlx5_esw_devlink_rate_leaf_tx_max_set(struct devlink_rate *rate_leaf, void *priv, u64 tx_max, struct netlink_ext_ack *extack); +int mlx5_esw_devlink_rate_leaf_tc_bw_set(struct devlink_rate *rate_node, void *priv, + u32 *tc_bw, struct netlink_ext_ack *extack); +int mlx5_esw_devlink_rate_node_tc_bw_set(struct devlink_rate *rate_node, void *priv, + u32 *tc_bw, struct netlink_ext_ack *extack); int mlx5_esw_devlink_rate_node_tx_share_set(struct devlink_rate *rate_node, void *priv, u64 tx_share, struct netlink_ext_ack *extack); int mlx5_esw_devlink_rate_node_tx_max_set(struct devlink_rate *rate_node, void *priv,