| Message ID | 20241119055741.147144-1-pavan.chebbi@broadcom.com (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net] tg3: Set coherent DMA mask bits to 31 for BCM57766 chipsets | expand |
On Mon, Nov 18, 2024 at 09:57:41PM -0800, Pavan Chebbi wrote: > The hardware on Broadcom 1G chipsets have a known limitation > where they cannot handle DMA addresses that cross over 4GB. > When such an address is encountered, the hardware sets the > address overflow error bit in the DMA status register and > triggers a reset. > > However, BCM57766 hardware is setting the overflow bit and > triggering a reset in some cases when there is no actual > underlying address overflow. The hardware team analyzed the > issue and concluded that it is happening when the status > block update has an address with higher (b16 to b31) bits > as 0xffff following a previous update that had lowest bits > as 0xffff. > > To work around this bug in the BCM57766 hardware, set the > coherent dma mask from the current 64b to 31b. This will > ensure that upper bits of the status block DMA address are > always at most 0x7fff, thus avoiding the improper overflow > check described above. This work around is intended for only > status block and ring memories and has no effect on TX and > RX buffers as they do not require coherent memory. > > Fixes: 72f2afb8a685 ("[TG3]: Add DMA address workaround") > Reported-by: Salam Noureddine <noureddine@arista.com> > Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> > Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com> > Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> > --- > drivers/net/ethernet/broadcom/tg3.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c > index 378815917741..d178138981a9 100644 > --- a/drivers/net/ethernet/broadcom/tg3.c > +++ b/drivers/net/ethernet/broadcom/tg3.c > @@ -17801,6 +17801,9 @@ static int tg3_init_one(struct pci_dev *pdev, > } else > persist_dma_mask = dma_mask = DMA_BIT_MASK(64); > > + if (tg3_asic_rev(tp) == ASIC_REV_57766) > + persist_dma_mask = DMA_BIT_MASK(31); > + > /* Configure DMA attributes. */ > if (dma_mask > DMA_BIT_MASK(32)) { > err = dma_set_mask(&pdev->dev, dma_mask); > -- > 2.39.1 > > Reviewed-by: Michal Kubiak <michal.kubiak@intel.com>
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index 378815917741..d178138981a9 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c @@ -17801,6 +17801,9 @@ static int tg3_init_one(struct pci_dev *pdev, } else persist_dma_mask = dma_mask = DMA_BIT_MASK(64); + if (tg3_asic_rev(tp) == ASIC_REV_57766) + persist_dma_mask = DMA_BIT_MASK(31); + /* Configure DMA attributes. */ if (dma_mask > DMA_BIT_MASK(32)) { err = dma_set_mask(&pdev->dev, dma_mask);
The hardware on Broadcom 1G chipsets have a known limitation where they cannot handle DMA addresses that cross over 4GB. When such an address is encountered, the hardware sets the address overflow error bit in the DMA status register and triggers a reset. However, BCM57766 hardware is setting the overflow bit and triggering a reset in some cases when there is no actual underlying address overflow. The hardware team analyzed the issue and concluded that it is happening when the status block update has an address with higher (b16 to b31) bits as 0xffff following a previous update that had lowest bits as 0xffff. To work around this bug in the BCM57766 hardware, set the coherent dma mask from the current 64b to 31b. This will ensure that upper bits of the status block DMA address are always at most 0x7fff, thus avoiding the improper overflow check described above. This work around is intended for only status block and ring memories and has no effect on TX and RX buffers as they do not require coherent memory. Fixes: 72f2afb8a685 ("[TG3]: Add DMA address workaround") Reported-by: Salam Noureddine <noureddine@arista.com> Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> --- drivers/net/ethernet/broadcom/tg3.c | 3 +++ 1 file changed, 3 insertions(+)