@@ -1766,6 +1766,7 @@ Kernel response contents:
limit of the PoE PSE.
``ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES`` nested Supported power limit
configuration ranges.
+ ``ETHTOOL_A_PSE_ID`` u32 Index of the PSE
========================================== ====== =============================
When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` attribute identifies
@@ -1839,6 +1840,9 @@ identifies the C33 PSE power limit ranges through
If the controller works with fixed classes, the min and max values will be
equal.
+The ``ETHTOOL_A_PSE_ID`` attribute identifies the index of the PSE
+controller.
+
PSE_SET
=======
@@ -970,6 +970,7 @@ enum {
ETHTOOL_A_C33_PSE_EXT_SUBSTATE, /* u32 */
ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT, /* u32 */
ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES, /* nest - _C33_PSE_PW_LIMIT_* */
+ ETHTOOL_A_PSE_ID, /* u32 */
/* add new constants above here */
__ETHTOOL_A_PSE_CNT,
@@ -83,6 +83,7 @@ static int pse_reply_size(const struct ethnl_req_info *req_base,
const struct pse_control_status *st = &data->status;
int len = 0;
+ len += nla_total_size(sizeof(u32)); /* _PSE_ID */
if (st->podl_admin_state > 0)
len += nla_total_size(sizeof(u32)); /* _PODL_PSE_ADMIN_STATE */
if (st->podl_pw_status > 0)
@@ -148,6 +149,9 @@ static int pse_fill_reply(struct sk_buff *skb,
const struct pse_reply_data *data = PSE_REPDATA(reply_base);
const struct pse_control_status *st = &data->status;
+ if (nla_put_u32(skb, ETHTOOL_A_PSE_ID, st->pse_id))
+ return -EMSGSIZE;
+
if (st->podl_admin_state > 0 &&
nla_put_u32(skb, ETHTOOL_A_PODL_PSE_ADMIN_STATE,
st->podl_admin_state))